Packard Bell Nec

Michael P Krau

Mark D Nicol

David T DeRoo

Saifuddin T Fakhruddin

Robert A Kohtz

Lloyd W Gauthier

David J DeLisle

Jimmy Dean Smith

Terence Paul O'Brien

Brian K Straup

Richard David Ball

Donald William Gohr

A programmable hardware timer provides a relatively consistently measure of predetermined time intervals over a relatively wide range of performance levels. The programmable hardware timer includes a downcounter, driven by a predetermined clock frequency, that counts a preprogrammed number of preselected time intervals. The time intervals, also programmable, are written to registers which, in turn, are used to control the downcounter such that the zero flag on the downcounter goes active at the predetermined time interval. A second downcounter is used to enable multiples of the predetermined time interval to be selected.

Programmable hardware timer including two programmable hardware

A computer system employs a process on warm boot which obviates the need to copy code in non-volatile memory to volatile memory; a normal function in a warm boot process. The computer system checks a warm boot flag which indicates that the code was previously copied on cold boot. By avoiding copying this already copied code and executing directly from the volatile memory considerable time is saved. Since BIOS code is typically on the order of 10K bytes, elimination of the necessity to rewrite BIOS and vectoring directly to BIOS image file in RAM saves on the order of ten thousand clock cycles.

Method for warm boot from reset

In the present invention, a single EEPROM is used to store firmware for the CPU, firmware for the SCP and the system password and other critical system data. Hardware protection is provided that prevents the CPU from accessing the portion of the EEPROM that contains the password or other critical systems data.

Method to store privileged data within the primary CPU memory space

A method and apparatus enables the BIOS to be stored on a mass storage device, such as a hard disk, to enable a computer system to be booted even during conditions of disk failure. A fully functional version of the BIOS, such as a first production version of the BIOS, provided on a non-volatile memory device, such as a MASKED ROM memory device or a one time programmable (OTP) memory device, is used to initially boot the computer system. An upgraded or newer version of the BIOS may be loaded into an unprotected area of the hard disk by way of a floppy disk. Initially, during installation, the system checks to determine if the upgraded version of the BIOS is compatible with the computer system and newer than the BIOS version currently stored in the computer system. If so, the upgraded BIOS is copied to the hard disk and treated like any other file. After the BIOS is copied to the hard disk, the system is rebooted to install the upgraded version of the BIOS. In the event of a disk crash, the fully functional or first production version of the BIOS in the OTP device enables the computer system to be rebooted and diagnostics to be run in order to ascertain the cause of the disk failure. By utilizing a fully functional or first production version of the BIOS stored in an OTP device for initial startup, the production cycle for manufacturing a personal computer can be reduced, as well as providing optimal utilization of OTP devices.

Disk based bios

Programmable hardware counter

The invention provides a simple I/O port which can be used to support a variety of system functions such as a revision, configuration or identification register. This port is provided with a means to be programmable once, upon system power-up so that changes to the port contents are possible, but only under controlled conditions. Once the register has been programmed, it will no longer respond to writes.

Write once read only registers

Write inhibited registers

A method and apparatus providing alternate access to standard ports to enable the functionality of such standard ports to be expanded without the need to provide additional software or hardware while obviating the problem that any non-standard commands will be ignored. All standard commands are written to the standard ports. However, any non-standardized commands are written to the standardized ports by way of an alternate access path. In particular, the non-standardized commands are written to an index register and a value register at non-standardized port addresses. The value written to the index register selects one of a predetermined group of index registers, while the value register is used for data for the register selected by the index register. By including standardized port addresses, such as 60H and 64H in the group of index registers, non-standardized commands can be written to these ports by way of the index register to enable non-standardized commands to be assigned to such standardized ports.

Alternate I/O port access to standard register set

This invention relates to a system for providing programmable configuration protection of a programmable Input/Output device. By configuration protection, it is meant that the programming options of an I/O controller can be set in accordance to a given environment, and then by use of a programming controlled signal, prevent the changing of the programmed environment or remove those programmed options considered unsafe in the now secured environment.

Growing community of inventors

Benton Harbor, MI, United States of America

Michael P Krau