At+t Corp.

Lucent Technologies Inc.

At&t Bell Laboratories

Michael P Bottiglieri

Stephen Joseph Brolin

Peter Allen Dempsey

Chandan Sarkar

Michael W Andrews

Michael A Miragliotta

The invention is a circuit which permits spare circuit packs to replace operational circuit packs while keeping peripheral circuitry apprised of the status of the packs. The circuit receives signals from a first conductor and returns the signals to the conductor so that a spare circuit pack can be removed without affecting the signals to the peripheral circuits. The circuit also detects the signals on a second conductor and applies the same signals when a circuit pack including the circuit is reconnected. The circuit also includes elements which prevent loading down the conductors while power from the circuit is cut off or during power up.

Circuit pack sparing arrangement

The integrity of a signal path through a transmission system (12), which processes successive blocks (14) of data during a given time frame, verified by establishing the parity of a selected one of the blocks as it enters and as it leaves the system. A lack of equality between the parities is indicative of a lack of path integrity.

Method and apparatus for data parity in a transmission system

Disclosed is a circuit which allows an n-bit time slot interchanger (TSI) to process m-bit wide information, where m is some fraction of n. A packing circuit receives the information from the TSI in the form of a series of n-bit segments. The circuit will choose m bits from each segment and produce an n-bit output which includes the m-bit segments in a desired order. The n-bit output can then be looped back to the TSI for insertion into an appropriate time slot.

Variable resolution time slot interchange circuit

A remote terminal for a subscriber loop carrier network operates by flow from one to another of units in the terminal of time division multiplexer data streams of binary valued digital bits. Each stream has the format of periodic frames of time slots of which each frame consists of (a) a service time slot containing only service bits, and (b) a plurality of customer slots which contain mostly bits coded with data from customers of the network, but which also include a less number of service bits. Each unit includes encoding means responsive to local synchronizing and clock pulses derived from data incoming to the unit to encode on each frame of the outgoing data stream synchronizing information consisting of (c) a synchronizing pattern comprising a coded sequence of service bits localized in the frame's service slot and (d) a spoiler pattern formed of service bits distributed over customer slots in the frame. The spoiler pattern is interrelated with the synchronizing pattern so that no fortuitous bit sequence occurring in the stream and including any bit beating customer data can falsely duplicate the synchronizing pattern. Each unit also includes decoding means responsive to the presence of synchronizing patterns in an incoming data stream to produce signals for synchronizing the operation of that unit with the pre-established timing of the incoming stream. Such units may be circuit cards having mounted thereon encoding and decoding means in the form of semiconductive integrated circuits and including binary counters used to implement the encoding and decoding functions.

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Wyckoff, NJ, United States of America

Michael P Bottiglieri