Comsat Corporation

Communications Satellite Corporation

Communications Satellite Corporation (comsat)

Michael Onufry, Jr

Henri G Suyderhoud

Jack H Rieser

Spiros S Dimolitsas

Krishnamoorthy Virupaksha

Samuel Joseph Campanella

Vaikunth Gupta

Eric R Kauffman

Vaikunth N Gupta

K Virupaksha

A digital circuit multiplier (DCM) system which permits encrypted signals to obtain a multiplication gain at the DCM equipment without decrypting the signals at the DCM equipment. Detection of speech/silence is made at the encryption stage and distinct and separable encryptions are applied to the speech and silence portions of the signal, as well as a control signal indicating which portions of the encrypted data stream correspond to speech and silence. At the DCME transmit unit, only the control signal portion of the data stream is decrypted and the encrypted silence frames are discarded to obtain multiplication gain. Thus, efficient use is made of the channel capacity without the need to decrypt the speech signal at the DCME. At the DCME receive unit the control signals are used to add encrypted silence frames back into the data stream. Once the received signals have reached a secure location, the decrypter unit decrypts the speech and silence frames to present a reconstituted speech signal, complete with silent portions, to the end user.

Encrypted digital circuit multiplication system

A facsimile communication system including a first processing circuit, connected to receive a facsimile signal from a first facsimile device, for converting the analog voiceband facsimile signal into a digital code signal representing information carried in the analog voiceband signal, and for transmitting the digital code signal; a second processing circuit, connected to receive the transmitted digital code signal from the first processing circuit, for converting the received digital code signal into an analog voiceband facsimile signal; and a second facsimile device, connected to receive the analog voiceband facsimile signal from the second processing circuit. The digital code signal includes a digital code which is repeated in the digital code signal an integral number of times. In another embodiment, the digital code signal contains another binary code which represents the position, within a data field, when information was first detected by the first processing circuit.

Line state transmission system over digital channels for group 3

An apparatus for and a method of permitting the in-band negotiation of enhanced capabilities between two or more facsimile interface units (FIUs) by using FIU capabilities control packets containing a plurality of data cells carrying information of the capability negotiation information is disclosed. In operation, a called station identification signal is transmitted from a remodulating FIU together with a special capabilities packet following the end of a line control packet. The calling FIU may issue a response agreeing to or modifying the compatible enhancements by sending its own special capabilities control packet containing compatibility negotiation information. In another aspect of the present invention, an FIU adds a set of data cells to a line control packet to minimize the possibility of data cell alignment due to degraded channel conditions. In accordance with the present invention, a unique word is selected and transmitted in the set of data cells so as to enhance the system performance and protocol tracking capability of the receiving FIU.

Facsimile interface unit (FIU) enhanced capabilities negotiation

A low-rate encoding/digital speech interpolation (LRE/DSI) system architecture is organized to eliminate the LRE mistracking problem normally associated with DSI-induced speech clipping, to reduce the number of LRE codes required and to provide a mechanism for gradually introducing overload.

Low-rate encoding/digital speech interpolation system

In an adaptive differential PCM (ADPCM) system transmitter, three quantizers provide, respectively, 3, 4, and 5-bit quantization at the signal sampling rate. Each quantizer produces, in response to an input signal sample, a coded signal I(n) in the form of a bit sequence the number of bits in the coded signal from each quantizer being different. The number of bits comprising the coded signal is proportional to the bit rate. The bit rate can thus be altered by switching the codec output to selected ones of the adaptive quantizers. To eliminate quantizing distortion during bit rate transitions, one adaptive quantizer is caused to operate in the dominant mode, to receive the input signal sample and produce the coded signal I(n). At the same time, the other adaptive quantizers operate in a secondary mode to update their step-size .DELTA.(n) on the basis of the quantized signal produced by the dominant mode quantizer. When a secondary mode quantizer is switched to the dominant mode, minimal time is required for tracking the input signal thereby reducing the quantization distortion during bit rate transitions.

Variable bit rate speech codec with backward-type prediction and

An audio echo control unit for a video teleconference system is provided with a suppression attack time which is a function of the microphone-to-audio speaker distance and a suppression hangover time which is a function of the room characteristics. Echo which results from a double-talk condition is eliminated by removing the break-in capability, and receive signal level modulation is eliminated by removing any variable loss devices from the transmission path.

Video teleconference audio echo control unit

An automatic H-register clear system for the prevention of erroneous convolution in adaptive digital echo cancellers is disclosed. Incoming signals from the H-register are accumulated and compared to a predetermined threshold value and when the value is exceeded, the H-register is cleared with the occurrence of the internal housekeeping cycle of the echo canceller. The clearing of the H-register allows a new impulse response model to be generated from new sampled data. In one embodiment using analog implementation, the accumulation takes place using a sequence of signal processing of digital-to-analog conversion, full wave rectification followed by integration of the signal. In another preferred embodiment using a counter detection system, each word is compared to a threshold and if this value is exceeded, a counter is indexed. If the value of the count in the counter exceeds a predetermined number during the sampling interval, the H-register is cleared. In this latter embodiment, either analog or digital implementation can be used.

Automatic H-register clear for prevention of erroneous convolution in

A low cost digital echo suppressor having break-in logic for overriding send-line interrupt operation. The send and receive signals are multiplexed and digitized. The digitized received signals are summed over a period of time to determine interrupt operation. The difference over a period of time of the receive and send line signals controls break in logic for overriding the interrupt operation.

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Clarksburg, MD, United States of America

Michael Onufry, Jr