Analog Devices Global

Analog Devices Global Unlimited Company

Analog Devices,inc.

Analog Devices International Unlimited Company

Michael Noel Morrissey

Bernard Patrick Stenson

Jan Kubik

Patrick Martin McGuinness

Shane Patrick Geary

Michael John Flynn

Baoxing Chen

Stephen O'Brien

Seamus Paul Whiston

Laurence Brendan O'Sullivan

Catriona Marie O'Sullivan

Sarah Carroll

Conor John Mcloughlin

Seamus A Lynch

Shane Geary

Patrick Mcguinness

The disclosed technology generally relates to forming metallization structures for integrated circuit devices by plating, and more particularly to plating metallization structures that are thicker than masking layers used to define the metallization structures. In one aspect, a method of metallizing an integrated circuit device includes plating a first metal on a substrate in a first opening formed through a first masking layer, where the first opening defines a first region of the substrate, and plating a second metal on the substrate in a second opening formed through a second masking layer, where the second opening defines a second region of the substrate. The second opening is wider than the first opening and the second region encompasses the first region of the substrate.

Plated metallization structures

Techniques for fabricating low-loss magnetic vias within a magnetic core are provided. According to some embodiments, vias with small, well-defined sizes may be fabricated without reliance on precise alignment of layers. According to some embodiments, a magnetic core including a low-loss magnetic via can be wrapped around conductive coils of an inductor. The low-loss magnetic vias can improve performance of an inductive component by improving the quality factor relative to higher loss magnetic vias.

Via for magnetic core of inductive component

A microelectronic circuit having at least one component adjacent a carrier that is not a semiconductor or sapphire. The circuit includes a component bearing stack of one or more layers having one or more passive components, which are adjacent or bonded to the carrier. In certain embodiments, the circuit also includes an etch stop layer of a material having a slower etch rate than silicon and a bond layer bonding the carrier and the component bearing one or more layers.

Microelectronic circuits and integrated circuits including a non-silicon substrate

Methods of forming a thin film are disclosed. One such method can include sputtering a target material to form a first thin film resistor and adjusting a parameter of deposition to modulate a property of a subsequently formed second thin film resistor. For instance, a substrate bias and/or a substrate temperature can be adjusted to modulate a property of the second thin film resistor. A temperature coefficient of resistance (TCR) and/or another property of the second thin film resistor can be modulated by adjusting the parameter of deposition. The target material sputtered onto the substrate can include, for example, a Cr alloy, a Ni alloy, SiCr, NiCr, or the like. A relationship can be established between the substrate bias and/or substrate temperature and the thin film resistor property, and the relationship can be used in selecting deposition conditions for a desired property value.

Methods of forming a thin film resistor

An isolator device and a corresponding method of forming the isolator device to include first and second electrodes, a layer of first dielectric material between the first and second electrodes, and at least one region of second dielectric material between the layer of first dielectric material and at least one of the first and second electrodes. The second dielectric material has a higher relative permittivity than the first dielectric material.

Isolator and method of forming an isolator

A method of trimming a component is provided in which the component is protected from oxidation or changes in stress after trimming. As part of the method, a protective glass cover is bonded to the surface of a semiconductor substrate prior to trimming (e.g., laser trimming) of a component. This can protect the component from oxidation after trimming, which may change its value or a parameter of the component. It can also protect the component from changes in stress acting on it or on the die adjacent it during packaging, which may also change a value or parameter of the component.

Method of trimming a component and a component trimmed by such a method

A magnetic core is provided for an integrated circuit, the magnetic core comprising: a plurality of layers of magnetically functional material; a plurality of layers of a first insulating material; and at least one layer of an secondary insulating material; wherein layers of the first insulating material are interposed between layers of the magnetically functional material to form subsections of the magnetic core, and the at least one layer of second insulating material is interposed between adjacent subsections.

Magnetic core for use in an integrated circuit, an integrated circuit including such a magnetic core, a transformer and an inductor fabricated as part of an integrated circuit

Growing community of inventors

Ballingarry, Ireland

Michael Noel Morrissey