Other

Intel Corporation

Michael Neilly

Naveen Kumar

Naveen Neelakantam

Guillermo Juan Rozas

H Peter Anvin

David Pardo Keppel

Sebastian Winkel

Ori Lempel

Nirajan L Cooray

A processor includes a processor core to execute a first translated instruction translated from a first instruction stored in first page of a memory. The processor also includes a translation indicator agent (XTBA) to store a first translation indicator that is read from a physical map (PhysMap) in the memory. In an embodiment, the first translation indicator is to indicate whether the first page has been modified after the first instruction is translated. Other embodiments are described as claimed.

Handling of binary translated self modifying code and cross modifying code

Methods of multi-threading, and systems thereof, are described. A first thread is executed. Context for the executing thread is maintained in a working register. Execution of the first thread is halted and execution of a second thread is begun by performing a rollback operation. The rollback operation causes context for the second thread to be copied from a first register into the working register.

Multi-threading based on rollback

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Cupertino, CA, United States of America

Michael Neilly