Analog Devices,inc.

Texas Instruments Corporation

Analog Devices International Unlimited Company

Analog Devices Global Unlimited Company

Michael Mueck

Michael C W Coln

Hongxing Li

Ronald F Cormier

Paul F Ferguson, Jr

Jonathan Ephraim David Hurwitz

Colin Gerard Lyden

Junhua Shen

Alain Valentin Guery

Quan Wan

Sandeep Monangi

Thomas M MacLeod

Lawrence Getzin

Sean Patrick Kowalik

Gustavo Castro

Claire Croke

Adam Glibbery

Aine McCarthy

Mary McCarthy

Michael Edward Bradley

Michael Christian Wohnsen Coln

Colm Patrick Ronan

Jason Cockrell

David Gerrard Laing

Gangadhar Burra

Rosemary B Ryan

Aine M Joyce

Aileen Ritchie

Mack Roger Lund

Alan Clohessy

Meabh Shine

Aine Mccarthy

Mary Mccarthy

Colm P Ronan

Michael CW Coln

Various examples are directed to configuring a configurable hardware module to perform a measurement of a physical quantity. A configuration manager may receive an indication of the physical quantity and performance factor data describing the measurement of the physical quantity. The configuration manager may generate a hardware configuration of the hardware based at least in part on the indication of the physical quantity and the performance factor data. The hardware configuration may comprise instruction data to configure the hardware module to execute a dynamic measurement of the physical quantity. The configuration manager may also generate configuration data describing the hardware configuration, wherein the configuration data comprises simulation data comprising input parameters for a simulation of the hardware configuration and hardware configuration data for configuring a hardware module to implement at least a portion of the hardware configuration.

Measurement-driven electronic device design environment and techniques

A signal acquisition or conditioning amplifier can be configured and controlled to use correlated doubling sampling (CDS) of a differential input signal, and a storage capacitor in a capacitive or other feedback network, a low power operational transconductance amplifier (OTA) capable of being powered down between CDS samplings, and which can be operated in a manner that provides good performance characteristics while still providing low or efficient power consumption. The amplifier and other signal processing circuitry can allow power to be scaled down, when less signal measurement throughput is needed, and to be scaled up, when more signal measurement throughput is needed. Such flexibility can help make the present approach useful for a wide range of signal acquisition and measurement applications. Precharging via buffer amplifiers can provide improved signal acquisition circuitry effective input impedance.

Correlated double sampling amplifier for low power

A low-noise, low-power reference voltage circuit can include an operational transconductance amplifier (OTA) with inputs coupled to a temperature-compensated voltage, such as can be provided by source-coupled first and second field-effect transistors (FETs) having different threshold voltages. A capacitive voltage divider can feed back a portion of a reference voltage output by the OTA to the inputs of the OTA to help establish or maintain the temperature-compensated voltage across the inputs of the OTA. A switching network can be used, such as initialize the capacitive voltage divider or other capacitive feedback circuit, such as during power-down cycles, or when resuming powered-on cycles. A switch can interrupt current to the OTA during the power-down cycles to save power. The cycled voltage reference circuit can provide a reference voltage to an ADC reservoir capacitor. Powering down can occur during analog input signal sampling, during successive approximation routine (SAR) conversion, or both.

Power-cycling voltage reference

An isolator system is disclosed in which a pair of circuit systems is separated by an isolation barrier but engage in mutual communication by an isolator device that bridges the isolation barrier. A first circuit system may include a measurement system generating measurement data and status monitor generating status data. The first circuit system also may include a communication system that multiplexes the measurement data and the status data for transmission across a common isolator device. In this manner, the number of isolator devices may be reduced over conventional designs.

Isolator system with status data integrated with measurement data

Various techniques that can provide a capability to background calibrate ADC linearity error, e.g., due to capacitor mismatch drift and other parameter drift, during normal ADC operation in which analog-to-digital signal conversions are ongoing. A method can include grouping capacitors of an ADC into multiple clusters and calibrating under an arbitrary signal condition. To quickly converge the calibration result, the same arbitrary signal can be converted twice, and the capacitor(s) being calibrated can be modulated after first conversion. The difference between the results of the first and second conversions can contain the error information that can be used for calibration, and the signal component can be removed by this process. These techniques can provide improved linearity at 20-bit level and beyond.

Analog to digital converter with background calibration techniques

An analog-to-digital converter (ADC) circuit including error correction circuitry for correcting offset drifts in an ADC, such as a successive approximation register (SAR) ADC. The offset drifts can be reduced, such as by sampling the offset following an analog-to-digital conversion and subsequently providing an error correction signal based on the sampled offset.

Analog-to-digital converter with offset calibration

A capacitance measurement system precharges first terminals (---) of a plurality of capacitors (--), respectively, of a CDAC (capacitor digital-to-analog converter) () included in a SAR (successive approximation register) converter () to a first voltage (V) and pre-charges a first terminal (-) of a capacitor (C) to a second voltage (GND). The first terminals are coupled to the first terminal of the capacitor to redistribute charges therebetween so as to generate a first voltage on the first terminals and the first terminal of the capacitor, the first voltage being representative of a capacitance of the first capacitor (C). A SAR converter converts the first voltage to a digital representation (DATA) of the capacitor. The capacitance can be a touch screen capacitance.

Capacitive measurement system and method

Embodiments of the present invention may provide a system with a first and second circuit system separated by an electrical isolation barrier but provided in communication by at least one isolator device that bridges the isolation barrier. The first circuit system may include a communication system to transmit data across a common isolator device as a series of pulses, and the second circuit system may receive the series of pulses corresponding to the data. The second circuit system may include a detector coupled to the common isolator device to detect the received pulses, a oneshot to frame the received pulse(s), and a controller to reconstruct the data based on accumulated framed pulse(s). Therefore, noise induced spurious pulses outside the oneshot intervals may be ignored by the second circuit system providing improved noise immunity.

Isolated system data communication

An analog-to-digital converter (ADC) system can sample an input voltage for at least a first conversion into a first N-bit digital value and to use the same input voltage sample for at least a second conversion into a second N-bit digital value. A difference between a result of the first conversion and a result of the second conversion can be driven toward zero to adjust weights of one or more of the bits to calibrated values for use in one or more subsequent analog-to-digital conversions of subsequent samples of the input voltage. Shuffling, dithering, or the like can help ensure that at least a portion of the decision paths used in the second conversion are different from the decision paths used in the first conversion. Calibration can be performed in the background while the the ADC is converting in a normal mode of operation.

ADC background calibration with dual conversions

Embodiments of the present invention may provide a circuit. The circuit may include a primary side, a secondary side, and an isolated energy transfer device electrically isolating the primary side and the secondary side. The primary side may include a first energy storage device coupled to a power source, a control system coupled to the first energy storage device for power, a second energy storage device, and a coupling system, coupled to the control system, to selectively couple the second energy storage device to the power source in a first phase and to selectively couple the second energy storage device to the primary side of the isolated energy transfer device during a second phase.

Isolated digital transmission with improved EMI immunity

A power delivery system is disclosed for an isolated measurement system in which a power transmitter and power receiver are provided at powered and unpowered sides of an isolation barrier, respectively. The power transmitter and power receiver may be coupled by an isolator. The power transmitter may deliver power to the power receiver to power components on the unpowered side of the isolation barrier. The system may include a controller provided in the powered side to generate a clock signal defining timing of a predetermined operation of the measurement system and to generate a disabling signal to the power transmitter controller synchronously with the timing of the predetermined operation.

Isolated measurement system with power transmitter disabling

A method for self-testing a dual-mass linear accelerometer in which a self-test voltage is applied to urge the two masses to move in opposite directions. Self-test signals are then applied to obtain a differential mode signal to detect masses repositioned in opposing directions. During testing, common disturbances to the two masses are rejected as common mode signals.

Robust self testing of a motion sensor system

Capacitance measurement system and method

A Successive Approximation Routine converter is provided in which a comparator is responsive to an output of a first Digital to Analog Converter, and an output of a second Digital to Analog Converter and to a DAC common mode output reference voltage, and wherein the comparator provides data to a SAR controller indicating which one of the DAC outputs is greater than the other, and how a common mode voltage on the DAC outputs compares to the reference voltage. On this basis the SAR controller can add or subtract a common mode offset to the trial words being presented at a given bit trial such that both differential and common mode convergence is achieved.

Differential input successive approximation analog to digital converter with common mode rejection

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Andover, MA, United States of America

Michael Mueck