Infineon Technologies Ag

Xignal Technologies Ag

Siemens Aktiengesellschaft

Michael Moyal

Daniel M Joffe

Bernhard Zojer

Herbert Zojer

Thomas Blon

Franz Dielacher

Ulrich Riedle

Martin Gr&ouml;pl

Riccio Ettore

Martin Ekkart

Dirk Schulz

The invention concerns a controllable current source comprising an output terminal for current delivery, which is connected via first and second current paths with first and second supply terminals, wherein the current paths each having a supply side on/off-switchable current control device and an output side current adjustment device. According to the invention, when the current control device is switched off, a predetermined adjustment potential, whose value lies between the two supply potentials, is applied to a node between the current control device and the current adjustment device. In this way, the performance characteristics of the current source are improved, in particular, negative injection and disturbances in the output current can be avoided. When the current source is used in a PLL, the jitter behavior at the output of the VCO is significantly improved.

Charge pump

An integrated circuit arrangement comprising a reference-current source device for providing a reference current (Iin) and comprising a current mirror device for mirroring the reference current (Iin) to an output current (Iout), wherein the current mirror device comprises a first FET (Q ), operated in saturation, whose channel carries the reference current; as well as a second FET (Q ), operated in saturation, whose channel carries the output current, wherein the gate connections of the two FETs (Q , Q ) are interconnected in order to ensure identical control voltages (Vgs) at these two FETs (Q , Q ), wherein at a channel connection of the first FET (Q ), a node for generating the reference current (Iin) carried by the channel of this FET is provided from several reference-current components (Iin , Iin ), wherein the reference-current components are provided at the node by the reference-current source device, and one (Iin ) of the reference-current components (Iin , Iin ) is carried by way of a resistance element (Qr) which is connected between the node and the gate connection of the first FET (Q ).

Current mirror for an integrated circuit

A high-speed sense current amplifier with a low power consumption for a memory cell, the sense current amplifier having: a first current mirror circuit, which amplifies a memory signal current received from the memory cell via a memory signal line and outputs it at a signal output of the sense current amplifier; a second current mirror circuit, which generates a setting current in a manner dependent on the received memory signal current; and an adjustable reference current source, which outputs a reference current to the signal output of the sense current amplifier, the magnitude of the output reference current being set, via a setting line, in a manner dependent on the setting current generated by the second current mirror circuit.

High speed sense amplifier

A device for echo attenuation in a digital transmission system comprises an impedance replica of the transmission path. The impedance replica consists of a terminating resistance replica, a transformer replica, and a transmission line replica. The device may further comprise a bridged tap replica. The transformer replica and the bridged tap replica are provided as on-chip components. The main transformer inductance replica and all components of the bridged tap replica are variable and may be set by software control.

Scaled impedance replica for echo attenuation in digital transmission systems

The signal regeneration circuit recovers a digital signal from an input signal that is supplied via metallic isolation (galvanic separation). The circuit has two input terminals for the input signal and one output terminal for the recovered digital signal. A current direction sensor detects the current direction prevailing between the input terminals and outputs the signal in accordance with the last prevailing current direction. The circuit is advantageously used in connection with digital circuits that require potential isolation at their input terminals.

Signal regeneration circuit

A subscriber circuit has several SLIC circuits (2, 3, 4, 5) combined in one multiple SLIC. The high-energy components of each SLIC circuit (2, 3, 4, 5) are realized as individual components (30, 31, 36, 37) in standard form. In order to remove non-linearities, the individual components (30, 31, 36, 37) are fed back via the respectively allocated SLIC circuit.

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Munich, Germany

Michael Moyal