Harris Corporation

Intersil Corporation

Red Chip Company Ltd.

Michael M Walters

Charles Edward Hawkes

Robert H Isham

Thomas Andrew Jochum

Robert G Hodgins

Matthew Burdet Harris

Stuart W Pullen

John Ulrick

An output stage for a class D amplifier reduces distortion and EMI, and greatly improves the efficiency. The output stage employs a combination of techniques including a soft switching network, multiple output inductors and beads to achieve, a high power full range class D amplifier that is complies with all FCC and CE specifications with greater than 90% efficiency at &frac13; power.

Output stage for high power class D amplifiers

A multi-phase DC/DC converter having an output voltage and including a plurality of converter channels. Each converter channel includes a converter channel input and a converter channel output. Each converter channel is configured for generating a converter channel current and for adjusting said converter channel current in response to a control signal electrically connected to each converter channel input. A control circuit generates an error signal representative of a comparison of the converter output voltage to a reference voltage. The control circuit includes a plurality of control circuit channels, each of which correspond to a converter channel. Each control circuit channel generates a channel current signal representative of a corresponding converter channel current, and generates a differential channel current signal representative of a comparison of the channel current signal to an average current signal. The average current signal is representative of an overall average current for the converter channels. Each control circuit channel generates a differential error signal representative of a comparison of the error signal to the differential channel current signal. Each control circuit channel includes a pulse width modulator having a ramp input and a control input. The control input is electrically connected to the differential error signal. The pulse width modulator generates the control signal based upon the differential error signal. The control signal is electrically coupled to a corresponding converter channel input. The control circuit generates the average current signal.

Multi-phase converter with balanced currents

A DC to DC buck pulse width modulator converter circuit includes an input, a high side output and a low side output. A high side switch is electrically connected between a common output node and a voltage supply, and controls a flow of current therethrough dependent upon the high side output. A low side switch is electrically connected between the common output node and ground, and controls a flow of current therethrough dependent upon the low side output. A virtual ground amplifier includes a second input electrically connected to ground. A current feedback resistor is electrically connected intermediate the common output node and a first input of the virtual ground amplifier. A variable impedance component is electrically connected to an output of the virtual ground amplifier and to the first input of the virtual ground amplifier. The impedance of the variable impedance component is varied dependent upon the output of the virtual ground amplifier. A sample and hold circuit is electrically connected intermediate the input of the pulse width modulator converter circuit and the variable impedance component. The sample and hold circuit sources a virtual ground current through the variable impedance component, and samples the virtual ground current.

Synchronous-rectified DC to DC converter with improved current sensing

A DC/DC converter has an output voltage and sources an output current to a load. The DC/DC converter includes an error amplifier with a reference input and a summing input. The reference input is electrically connected to a reference voltage. The summing input is electrically connected to the output voltage and the output current. The summing input is configured for adding together the output voltage and the output current. The error amplifier issues an error signal and adjusts the error signal dependent at least in part upon the output voltage and the output current. A comparator receives the error signal. The comparator has a ramp input electrically connected to a voltage ramp signal. The comparator issues an output signal that is based at least in part upon said error input. A power switch has an on condition and an off condition, and supplies dc current to the load when in the on condition. The power switch has a control input electrically connected to the comparator output signal. The power switch is responsive to the control input to change between the on condition and the off condition to thereby adjust the output current of the DC/DC converter.

Current mode dc/dc converter with controlled output impedance

A circuit includes a plurality of DC-to-DC converter circuits and separates in time switching of the respective power switches of the DC-to-DC converter circuits which would otherwise be switching at nearly a same time, such as based upon a same desired output level. The switching time may be separated by inverting a periodic control waveform of at least one of the DC-to-DC converter circuits. The multiple output DC-to-DC converter circuit thereby provides an increased noise margin and operates with greater accuracy and stability. The circuit may also determine when the DC-to-DC converter circuits would otherwise be switching at nearly the same time, and activate the switching time separation responsive thereto. For example, the determination may be made based upon a selectable output level being within a predetermined range of at least one other output level. The circuit in accordance with the invention is particularly advantageous for a single integrated circuit implementation, and may be used, for example, on a portable computer motherboard.

Multiple output DC-to-DC converter having enhanced noise margin and

A DC-to-DC power converter includes at least one power switch, a pulse width modulation circuit for generating control pulses for the at least one power switch, an output inductor connected to the at least one power switch, and a current sensor connected in parallel with the inductor for sensing current passing through the inductor. The current sensor preferably includes a resistor and a capacitor connected together in series. The current sensor is connected to a peak current control loop circuit cooperating with the pulse width modulation circuit for controlling the at least one power switch responsive to the current sensor. The resistor and capacitor preferably have respective values so that the current sensor is a substantially instantaneous current sensor. The output inductor has an inductance and a direct current (DC) resistance defining a first time constant. In one embodiment, the resistor and capacitor of the current sensor define a second time constant within a predetermined range of each other. In another embodiment, the resistor and capacitor of the current sensor define a second time constant substantially equal to the first time constant.

DC-to-DC converter with inductor current sensing and related methods

An electronic circuit includes a dynamic regulator connected to a load and a dc-to-dc converter to reduce a need for bulky and expensive capacitors which would otherwise be required to suppress transients. The dynamic regulator comprises one or both of a current source circuit for actively sourcing current to the load during load current demand transients, and a current sink circuit for actively sinking current from the load during load current excess transients. The dynamic regulator preferably senses the load voltage, and tracks the load voltage. The current source circuit preferably includes a current source switch, and a current source controller for operating the current source switch responsive to the load voltage falling rapidly with respect to the tracked load voltage. In a similar fashion, the current sinking circuit may include a current sink switch, and a current sink controller for operating the current source switch responsive to the load voltage rising quickly above the tracked load voltage. In one embodiment, the load voltage tracking may be provided by a resistor-capacitor (R/C) network connected across the load. The R/C network may operate at a fast time constant for following load ripple, but at a slower time constant when sourcing or sinking current. The dynamic regulator is preferably a monolithic integrated circuit and may be either separate from or incorporated into the dc-to-dc converter.

DC-dC converter having dynamic regulator with current sourcing and

A DC-to-DC converter includes a pulse width modulation circuit for modulating a switch to produce current pulses having at least a minimum pulse width to thereby control an output voltage to the load. The converter also includes a current limit determining circuit for determining when a desired peak current is no longer sufficient to maintain a desired output voltage thereby defining a current limit condition. In addition, the pulse width modulating circuit, when operating at the minimum pulse width, thereby defines a minimum pulse width condition. Accordingly, the converter preferably further includes an over-current determining circuit for determining an over-current condition responsive to the minimum pulse width condition being reached during a current limit condition. The converter may turn off the switch responsive to an over-current condition. A blanking signal may be used to clamp a comparator and established a minimum pulse width. Accordingly, a timer may also be used with the blanking signal to determine that the minimum pulse width condition has been reached. Method aspects of the invention are also disclosed.

DC-to-DC converter having fast over-current detection and associated

A method and circuit for modifying the clamping level (VCLAMP) of the error signal voltage (VERROR), which clamp in turn limits the peak current in the inductor of a slope-compensated, current mode DC/DC converter. VCLAMP may be modified and/or variable such that it is a function of average current in the inductor, peak current in the inductor, the converter duty cycle and/or the level of slope compensation used in the converter. The modification of VCLAMP may result in the peak current limit being independent of the converter duty cycle and/or the level of slope compensation used in the converter. Further, the modification of VCLAMP does not compromise the operational stability of the converter which is achieved by the use of a slope compensation. In addition, the clamping of the error signal before slope compensation rather than after slope compensation avoids instability at high duty cycles.

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Raleigh, NC, United States of America

Michael M Walters