Skyworks Solutions, Inc.

Conexant Systems, Inc.

Michael Lynn Gerard

Paul Raymond Andrys

Ramanan Bairavasubramanian

Matthew Lee Banowetz

Philip Howard Thompson

Terrence John Shie

Dwayne Allen Rowland

Jianxing Ni

Terry J Shie

Michael L Hageman

David Anthony Sawatzky

In a portable radio transceiver, a power amplifier system includes a saturation detector that detects power amplifier saturation in response to duty cycle of the amplifier transistor collector voltage waveform. The saturation detection output signal can be used by a power control circuit to back off or reduce the amplification level of the power amplifier to avoid power amplifier control loop saturation.

Power amplifier saturation detection

Circuits, devices and methods related to multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.

Linearity performance for multi-mode power amplifiers

Power amplifier having biasing with selectable bandwidth. In some embodiments, a power amplifier can include an amplifying transistor having a base for receiving a signal to be amplified, and a bias circuit configured to bias the amplifying transistor. The bias circuit can include a reference transistor having a base coupled to the base of the amplifying transistor and a collector coupled to a reference current source. The bias circuit can further include a coupling circuit that couples the collector and the base of the reference transistor. The coupling circuit can include a switchable element configured to allow the coupling circuit to be in a first state to provide a first bandwidth for the bias circuit or a second state to provide a second bandwidth for the bias circuit.

Power amplifier having biasing with selectable bandwidth

Improved power amplifier (PA) bias circuit having parallel emitter follower. In some embodiments, a bias circuit for a PA can include a first bias path implemented to couple a base node of an amplifying transistor and a supply node, with the first bias path being configured to provide a base bias current to the base node. The PA can further include a second bias path implemented to be electrically parallel with the first bias path between the base node and the supply node. The second bias path can be configured to provide an additional base bias current to the base node under a selected condition.

Power amplifier bias circuit having parallel emitter follower

Systems, circuits and methods related to low power efficiency improvement in multi-mode multi-band power amplifiers. In some embodiments, a power-amplifier (PA) system can include a first amplification path having one or more PAs configured to generate a high power radio-frequency (RF) signal from an input RF signal when in a high power mode. The PA system can further include a second amplification path having one or more PAs configured to generate a low power RF signal from the input RF signal when in a low power mode. The PA system can further include a switching circuit coupled to the first amplification path and the second amplification path. The switching circuit can be configured to allow amplification of the input RF signal through the first amplification path in the high power mode or the second amplification path in the low power mode.

Systems, circuits and methods related to low power efficiency improvement in multi-mode multi-band power amplifiers

Improved linearity performance for multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.

Multimode power amplifier bias circuit with selectable bandwidth. In some embodiments, a bias circuit for a power amplifier can include a first bipolar junction transistor (BJT) configured to pass a reference current. The first BJT can be coupled with a second BJT that performs at least some amplification for the power amplifier. The first and second BJTs can be configured as a current mirror. The bias circuit can further include a coupling circuit that couples the collector and the base of the first BJT. The coupling circuit can include a switchable element to allow the coupling circuit to be in a first state or a second state. The first state can be configured to yield a first bandwidth for the bias circuit, and the second state can be configured to yield a second bandwidth for the bias circuit.

Multimode power amplifier bias circuit with selectable bandwidth

The invention provides a system that enables a power amplifier to operate in a compressed mode and then be switched during operations to operate in a linear mode. Broadly conceptualized, the system may include a power amplifier and a bias controller that efficiently permits a communication device to function with either the compressed waveforms of a first air interface system or linear waveforms from other air interface systems.

Dual mode power amplifier having a common controller

The invention includes an amplifier and a biasing circuit. The amplifier may have one or more driver stages and a final stage. Each stage may be connected in series to pass along and amplify an input signal from one stage to the next. The input signal level may increase over time. The biasing circuit may include a voltage follower having an output and a reference transistor. Each stage may include a transistor having a base that is connected to the output of the voltage follower. A resistor may be placed between each transistor stage base and the output of the voltage follower. The base of the final stage transistor may be DC connected to the reference transistor base. In operation, the reference transistor collector current and thus the final stage base bias voltage may be maintained at fixed level by feedback through the voltage follower. However, the base bias current of the final stage and, thus, the voltage drop across the final stage base bias resistor and the voltage follower output voltage may increase with the input signal level. The increase in the voltage follower output voltage, in turn, may increase the base bias voltage of one or more driver stages. The increase of the base bias voltage of a driver stage as a function of an increase in the input signal level may extend the amplifier gain compression point to a higher output power level.

Growing community of inventors

Cedar Rapids, IA, United States of America

Michael Lynn Gerard