Cirrus Logic Inc.

Michael L Larson

Gautam P Vaswani

Tom A Dye

A graphics processor for rasterizing graphics data using display list programming to a host computer system memory. The processor dynamically rasterizes the display list generated by a host processor to either graphics memory local to the graphics processor or to the host system memory. The graphics processor of the present invention includes a prefetch unit having instruction prefetch logic for prefetching and decoding next opcode instructions in a display list of instructions from system memory. Prefetching a next instruction eliminates steup time necessary to fetch subsequent opcode instructions after a first opcode instruction has been fetched. The next opcode instruction in a sequential display list of instructions is prefetched with parameter data associated with the first fetched opcode instructions to save the graphics processor extra instruction fetch cycle time necessary to fetch subsequent opcode instructions. The graphics processor further includes a bus mastering unit which allows the graphics processor to master the host computer system bus during the transfer of display list instructions from host computer system memory and the subsequent processing of these instructions in an uninterrupted mode.

Method and apparatus for prefetching a next instruction using display

In a computer system having a host processor, a peripheral graphics device, a display screen, and a memory, a non-homogenous second order perspective texture mapping process. Polygon coordinates, a.sub.m,n, defining a texture polygon, are received. Initial values are received for a set of parameters including u.sub.main, v.sub.main, dv.sub.ortho, dv.sub.main, du.sub.ortho, du.sub.main, d.sup.2 u.sub.ortho, d.sup.2 u.sub.main, d.sup.2 v.sub.ortho, d.sup.2 v.sub.main, du.sub.ortho-ADD, and dv.sub.ortho-ADD. The texture polygon includes span regions. A span value, j, is set to an initial value to designate an initial span region of the texture polygon in (m, n) polygon coordinate space. The total number of rows, n.sub.max, is determined for the current span region of the polygon. The total number of polygon coordinates, m.sub.max, in the current row, n, of the texture polygon is determined. An (x, y) display coordinate, corresponding to the current polygon coordinate, a.sub.m,n, is set by translating from (m, n) polygon space to (x, y) display coordinate space. Texture coordinates, u(a.sub.m,n) and v(a.sub.m,n), are determined, according to the present invention, for each polygon coordinate, a.sub.m,n, using linear interpolation based on a set of relationships that utilize the above parameters without using a repetitive divide operation. A display pixel of a color determined according to texture coordinates, u(a.sub.m,n) and v(a.sub.m,n), is rendered on a display screen at the determined (x, y) position.

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Austin, TX, United States of America

Michael L Larson