Fairchild Semiconductor Corporation

Michael L Fowler

James B Boomer

Steven M Macaluso

A WDM system is used to transfer bytes of data between keyboard, display and camera portions of a hand held device. The data signals are converted into light wavelengths via lasers or LEDs of differing wavelengths and transported over an optical fiber cable. Mems devices help direct the wavelengths to the optical cable and mems devices may be used at the receiving end. The receiver illustratively has a photodiode array to receive the different wavelengths and produce electronic signals. Optical filters and micro-ring resonators may be employed.

Wave division multiplexing replacement of serialization

A serializer/deserializer is disclosed with a flexible design that allows for sending data streams between computer systems where the power dissipation is markedly reduced by placing the serializer/deserializer in a standby, low power mode between the sending of data. Word data bits are framed and sent along with clock pulses that define when the bits may be reliably received. High speed, typically, CML logic is used for the transmission line drivers and together with the clock pulse, a data word is sent faster than the computer system can send the next word to the serializer/deserializer. The disclosure frames the word and detects the word end, whereupon the system is placed into the standby mode. In addition the serializer/deserializers may be placed in a master/slave arrangement where the slave can be arranged to use the master's clock to send word data bits back to the master.

Low power serdes architecture using serial I/O burst gating

A serializer and a deserializer are disclosed and shown operating singly or as a pair. The invention operates independently from any outside system reference clock. The inventive system provides an internal bit clock that serializes the data when sending and de-serializes the data when receiving. A bit clock or pulse travels with the data word bits to define when a bit is stable. The system uses word boundary bits operating with a bit clock to distinguish different data words, as described in the parent application. The system operates either synchronously or asynchronously with the base computer or other such digital system, including I/O devices. The invention finds use where new data to be sent is strobed into the serializer, but also where a change in the data bit content itself will cause the changed data to be loaded into the serializer and sent bit by bit. The system operates where new data is strobed or loaded by the serializer (not the base computer system) when the last data word has been sent. In this case a signal is generated when the last word has been sent in the serializer that causes new data to be loaded for sending. Half duplex and full duplex configurations as disclosed. Similar, corresponding operations occur at the deserializer.

Sending and/or receiving serial data with bit timing and parallel data conversion

A programmable switch of three or more ports, each port having data lines separate from lines sharing control and addressing. The programmable switch includes internal logic control and electronic modules that accept and deserialize the control and address signals. The logic control directs the data in signals to one or more of the output data lines. Since the data and control and addressing lines are separate, the control may act concurrently with the data to direct the data properly. The sending unit must synchronize such operations to ensure data coherency and proper timing. The data signal path from any input to any or all outputs is designed to have, typically, only a single logic gate or on transistor switch delay.

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Saco, ME, United States of America

Michael L Fowler