Microchip Technology Inc.

Atmel Corporation

Michael Klein

Albert Weiner

Daniel Joseph Russell

Daniel J Russell

Jeffrey S Hapke

Sridhar Devulapalli

Brian Cherek

An input circuit that recognizes (e.g., buffers) logic level signals (e.g., of an input signal) represented by voltage levels that are lower than a supply voltage of an input circuit, and that exhibits static current draw immunity during stable states of an input signal. In one or more examples, series inverters are provided to buffer an input node and an output node of the input circuit. A voltage domain at the input circuit or output node may be higher than a voltage domain at the input node. Power supply to a first inverter of the series inverters may be turned OFF at least partially responsive to an indication that an output signal is a logic high; and power supply to the first inverter of the series inverters may be turned ON at least partially responsive to an indication that the output signal is a logic low. A third inverter may be maintained utilizing an input signal voltage to detect a falling edge of the input signal and turn ON power supply to the first inverter at least partially responsive thereto.

Recognizing transistor-transistor logic levels (TTL) at an input circuit with increased immunity to static current draw

Disclosed is a fault event detector configured to detect a fault injection event in an area of a chip that includes a vulnerable digital circuit. Such a fault event detector may include a bistable device that changes state at least partially in response to a presence of a fault injection event in a surrounding area of the fault event detector. Such a fault event detector may be arranged relative to a vulnerable digital circuit such that the vulnerable digital circuit is substantially located within the surrounding area of the first fault event detector.

Fault injection event detection at a chip and related systems, method and devices

A charge pump is incorporated into circuitry of an RFID tag. The charge pump takes advantage of an antenna voltage phase to eliminate the need for a charge pump clock generator. Placement of the charge pump in the RFID circuitry reduces the number of pump stages and eliminates drivers used in each pump stage. In some implementations, an RFID tag comprises antenna circuitry, including a tuned antenna, for receiving an RF signal. Voltage conversion circuitry in the RFID tag is coupled to the antenna circuitry and operable for converting a varying magnetic field produced in the antenna to a voltage source. A charge pump is coupled to output voltage signals of the antenna circuitry which provide the charge pump with a high starting reference voltage and a two phase pump clock.

Non-volatile memory charge pump for radio frequency identification (RFID) system

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Michael Klein