Motorola Corporation

International Business Machines Corporation

Other

Pearson Education, Inc.

Michael Julio Garcia

William C Moyer

Michael D Snyder

Robert J Reese

Charles Roberts Moore

Michael Scott Allen

David W Todd

James B Gullette

Brian Keith Reynolds

James Setaro

Yoanna Baumgartner

Wayne Ostler

Samuel Sean Dooley

Charles McQuilkin

Donald DeLand

Jennifer Ramirez

Lisa Eggers-Robertson

Denis G Pearce

The present invention automatically replaces in an assessment response a string of mathematical symbols determined to be ambiguous with an unambiguous string of mathematical symbols. An editing tool may receive an assessment response from a client over a communication network. The assessment response may comprise i) a text with a mathematical meaning and ii) a string of mathematical symbols. The text and the string of mathematical symbols represent different non-overlapping characters in the assessment response. The editing tool may match the string of mathematical symbols with a known ambiguous string of mathematical symbols and determine the mathematical meaning in the text of the assessment response. The editing tool may replace the string of mathematical symbols determined to be ambiguous with an unambiguous string of mathematical symbols to generate an updated assessment response. The editing tool may transmit the updated assessment response to the client for display.

Editing tool for math equations

Cutting tools and machining tools are provided having PCBN tips and/or coatings bonded to their cutting or machining surfaces for cutting or machining cement and/or mineral based hard building materials such as Hardiplank&reg;.

Method for cutting and machining hard materials

A bus protocol for a split bus (,) where each device (,) coupled to the bus has an age-based queue (,) of pending transactions. Queues are updated as transactions are executed. A central arbiter (,) has a copy of each device's queue (,). A priority transaction is determined from among all the queues in the arbiter. A data transaction index (DTI) is broadcast during the data tenure to all devices indicating the position in the queue of the next transaction. The index allows out-of-order data transfers without the provision of a static tag during the address tenure. Queues maintain a history of pending transactions. In one embodiment, each device receives a separate data bus grant (DBG), allowing a single provision of the index to both a source and a sink device.

Method and apparatus for transferring data on a split bus in a data processing system

A method of transferring data between a slave device (20) in communication with a processor interface bus (34) where the processor interface bus is in communication with a master device (12) including receiving an address from the processor interface bus (34) where the address was provided by the master device (block 302). A first signal is asserted (blocks 318 and 324) on the processor interface bus (34) to indicate that the slave device (20) is servicing a data transfer transaction. A second signal is asserted (block 320) on the processor interface bus (34) to indicate whether data to be transferred using the processor interface bus (34) is to be stored in main memory (36) by a main memory controller (32) in communication with the processor interface bus (34). The data is transferred (block 326) between the slave device (20) and the processor interface bus (34).

Method and apparatus for transferring data over a processor interface bus

A method and system in a data processing system for transferring data from a first device to a second device within the data processing system. The data processing system includes a data bus, an address bus, a first address space associated with a memory and a second address space associated with an input/output device. Initially, an operation request package is transmitted to a second device from a first device, which informs the second device of the total amount of data to be transferred. A transfer signal is then transmitted in the data processing system. The transfer signal identifies the transfer as a transfer concerning an address in the second address space associated with the input/output device. A first address package is then transmitted to the second device from the first device on the address bus. The first address package includes a transfer identifier, a first identifier associated with the first device and a second identifier associated with the second device. A second address package, comprising a byte count and an address, are transmitted to the second device from the first device on the address bus. If data is to be transferred, the data is then transferred on the data bus. Finally, a reply signal may be transmitted between the first and second devices, acknowledging the success or failure of the data transfer.

System for transferring data between input/output devices having

A method and system in a data processing system for transferring data from a first device to a second device within the data processing system. The data processing system includes a data bus, an address bus, a first address space associated with a memory and a second address space associated with an input/output device. Initially, a transfer signal is transmitted in the data processing system. The transfer signal identifies the transfer as a transfer concerning an address in the second address space associated with the input/output device. A first address package is then transmitted to the second device from the first device on the address bus. The first address package includes a transfer identifier, a first identifier associated with the first device and a second identifier associated with the second device. A second address package, comprising a byte count and an address, are transmitted to the second device from the first device on the address bus. If data is to be transferred, the data is then transferred on the data bus. Finally, a reply signal may be transmitted between the first and second devices, acknowledging the success or failure of the data transfer.

System for initiating data transfer between input/output devices having

A data processing system (10) and method for performing a snoop-retry protocol using an arbiter (14). Multiple bus masters (12, 16, 17) are coupled to multiple shared buses (20, 22, 24, 26). Each bus master (12, 16, 17) may initiate a bus transaction ('initiating master'), or snoop the bus transaction ('snooping bus master') occurring on a shared bus (20). When an initiating processor requests access to a dirty cache line in a memory (18), a snooping bus master asserts a shared address retry (ARTRY*) signal to inform the initiating processor to relinquish ownership of the shared bus (20) and retry the bus transaction. Upon detecting the shared ARTRY* signal, all potential bus masters remove their bus requests and ignore any bus grants from the arbiter (14), thus allowing the snooping processor which asserted the ARTRY* signal to gain ownership of the shared bus (20) to perform the snoop copyback. The arbiter (14) provides simple arbitration support to guarantee the update of the memory (18) has the highest priority among masters ( 12, 16, 17).

Method and apparatus for performing a snoop-retry protocol in a data

A data processing system (10) and method for performing bus arbitration protocol using an arbiter (14). The data processing system (10) has multiple bus masters (12, 16) each of which is coupled to multiple shared buses (20, 22, 24, 28). The arbiter (14) detects a bus request from a requesting bus master, and responds with a bus grant to notify the requesting bus master that the arbiter has selected the requesting bus master to be a bus-master elect for a shared bus (20). The requesting bus master monitors a shared signal line to determine when a current bus master has released ownership of the shared bus (20). When the requesting bus master assumes ownership of the shared bus it deactivates the bus request signal for a dock period after commencement of the bus transaction, which allows the arbiter (14) to select a next bus master-elect, thereby preventing any bus master from monopolizing the shared bus (20).

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Austin, TX, United States of America

Michael Julio Garcia