Invensense, Inc.

Sitime Corporation

Michael Julian Daneman

Martin Lim

Paul Merritt Hagelin

Charles I Grosjean

Kegang Huang

Nikhil Apte

Xiang Li

Aaron Partridge

Ginel C Hill

Julius Ming-Lin Tsai

Erhan Polatkan Ata

Li-Wen Hung

Joseph Seeger

Jongwoo Shin

James Christian Salvia

Renata Melamud Berger

Bruno Werner Garlepp

Fariborz Assaderaghi

Fang Liu

Mei-Lin Chan

Stephen Lloyd

Igor Tchertkov

Anthony D Minervini

Michael Henderson Perrott

Brian H Kim

Nicholas Miller

Fariboz Assaderaghi

Steven Saeed Nasiri

Thomas Chen

A MEMS element within a semiconductor device is enclosed within a cavity bounded at least in part by hydrogen-permeable material. A hydrogen barrier is formed within the semiconductor device to block propagation of hydrogen into the cavity via the hydrogen-permeable material.

MEMS with small-molecule barricade

A semiconductor device includes a first silicon layer disposed between second and third silicon layers and separated therefrom by respective first and second oxide layers. A cavity within the first silicon layer is bounded by interior surfaces of the second and third silicon layers, and a passageway extends through the second silicon layer to enable material removal from within the semiconductor device to form the cavity. A metal feature is disposed within the passageway to hermetically seal the cavity.

MEMS cavity with non-contaminating seal

A Piezoelectric Micromachined Ultrasonic Transducer (PMUT) device is provided. The PMUT includes a substrate and an edge support structure connected to the substrate. A membrane is connected to the edge support structure such that a cavity is defined between the membrane and the substrate, where the membrane is configured to allow movement at ultrasonic frequencies. The membrane includes a piezoelectric layer and first and second electrodes coupled to opposing sides of the piezoelectric layer. The PMUT is also configured to operate in a Surface Acoustic Wave (SAW) mode. Also provided are an integrated MEMS array, a method for operating an array of PMUT/SAW dual-mode devices, and a PMUT/SAW dual-mode device.

Ultrasonic transducer operable in a surface acoustic wave (SAW) mode

A Piezoelectric Micromachined Ultrasonic Transducer (PMUT) device is provided. The PMUT includes a substrate and an edge support structure connected to the substrate. A membrane is connected to the edge support structure such that a cavity is defined between the membrane and the substrate, where the membrane configured to allow movement at ultrasonic frequencies. The membrane comprises a piezoelectric layer and first and second electrodes coupled to opposing sides of the piezoelectric layer. For operation in a Capacitive Micromachined Ultrasonic Transducer (CMUT) mode, a third electrode is disposed on the substrate and separated by an air gap in the cavity from the second electrode. Also provided are an integrated MEMS array, a method for operating an array of PMUT/CMUT dual-mode devices, and a PMUT/CMUT dual-mode device.

Supplemental sensor modes and systems for ultrasonic transducers

A semiconductor device includes first and second exposed electrical contacts and a cavity having a microelectromechanical system (MEMS) structure therein. A conductive path extends from the first exposed electrical contact to the cavity and an over-voltage protection element electrically is coupled between the first and second exposed electrical contacts.

MEMS with over-voltage protection

A method for generating an image is provided. The method comprises capturing a first set of image pixels by an ultrasonic sensor comprising an array of ultrasonic transducers using a first beamforming pattern, wherein the first beamforming pattern comprises a first pattern of transmit signals routed to a plurality of ultrasonic transducers of the ultrasonic sensor. The method further comprises capturing a second set of image pixels at the ultrasonic sensor using a second beamforming pattern, wherein the second beamforming pattern comprises a second pattern of transmit signals routed to the plurality of ultrasonic transducers. The second beamforming pattern is different than the first beamforming pattern. The second set of image pixels corresponds to an edge region of the ultrasonic sensor. The method additionally comprises combining the first set of image pixels and the second set of image pixels to form the image. An electronic device and a method of generating an image of a fingerprint with a fingerprint sensor are also provided.

Image generation in an electronic device using ultrasonic transducers

A Microelectromechanical systems (MEMS) structure comprises a MEMS wafer. A MEMS wafer includes a handle wafer with cavities bonded to a device wafer through a dielectric layer disposed between the handle and device wafers. The MEMS wafer also includes a moveable portion of the device wafer suspended over a cavity in the handle wafer. Four methods are described to create two or more enclosures having multiple gas pressure or compositions on a single substrate including, each enclosure containing a moveable portion. The methods include: A. Forming a secondary sealed enclosure, B. Creating multiple ambient enclosures during wafer bonding, C. Creating and breaching an internal gas reservoir, and D. Forming and subsequently sealing a controlled leak/breach into the enclosure.

Methods for CMOS-MEMS integrated devices with multiple sealed cavities maintained at various pressures

Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally, or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.

Release chemical protection for integrated complementary metal-oxide-semiconductor (CMOS) and micro-electro-mechanical (MEMS) devices

Growing community of inventors

Campbell, CA, United States of America

Michael Julian Daneman