Agere Systems Inc.

Lsi Corporation

Agere Systems Guardian Corp.

Vtc Inc.

Michael Joseph Peterson

Jason P Brenden

David W Kelly

Jaydip Bhaumik

Ross Wilson

Robert Wimmer

Paul Mazur

Dames A Dahlberg

Ram S Narayan

A write driver circuit for generating a write current pulse for use by a magnetic write head includes an output stage adapted for connection with the magnetic write head and a charge storage circuit connected with the output stage. The charge storage circuit is operative in a first mode to store a prescribed charge and is operative in a second mode to transfer at least a portion of the charge stored therein to the output stage to thereby enable an output voltage level of the output stage to extend beyond a voltage supply rail of the write driver circuit. A control circuit in the write driver circuit is operative to generate at least one control signal for selectively controlling a mode of operation of the charge storage circuit.

Over-the-rail write driver for magnetic storage systems

Various systems and methods for reducing cross coupling in proximate signals are disclosed. As one example, a system for reducing cross-coupling in adjacent signals that includes an active slew rate limiter circuit is disclosed. The active slew rate limiter circuit is operable to receive an input signal, and to provide an output signal based on the input signal with a controlled slew rate. In some cases, such systems may be included within a storage device that includes a read head. In such cases, the systems may operate to assure a substantially constant power dissipation within the read head.

Systems and methods for reduction of cross coupling in proximate signal lines

A breakdown protection circuit for a source follower comprising a field effect transistor (FET). The protection circuit comprises a plurality of PFET's and NFET's that are controlled to exhibit on and off states for advantageously configuring a gate, source, drain and body of the source follower FET, to avoid breakdown of and forward biasing of certain FET junctions.

Apparatus and method for breakdown protection of a source follower circuit

A three-phase spindle motor has three terminals each driven with pulse width modulated signals. Rotation of the motor is controlled by iteratively measuring an electrical period of the motor, determining a rotational position of the motor, and synchronizing the sinusoidal pulse width modulation of the spindle motor with the measured electrical period. The electrical period of the motor is measured by detecting zero crossings in the a back electromotive force induced at a first terminal of the motor and determining the time between successive zero crossings. The rotation position of the motor is determined based upon the last measured electrical period and a location of last detected zero crossing. The zero crossings are detected by selecting a time window during which the back electromotive force signal is sensed for zero crossings. The time window is selected as a function of the last measured electrical period and the rotational position of the motor.

Digital spindle control architecture

A motor controller for an electric motor having a plurality of motor terminals is connected to a power supply and comprises a commutation control, a current sensor, a peak target circuit, a pulse width control and a reverse current control. The commutation control is connected to the motor terminals for causing current pulses to flow through selected terminals during each commutation state. The current sensor provides a sense signal representative of the current pulses, and the peak current target circuit provides a target signal. The pulse width control controls pulse width of the current pulses as a function of the sense signal and the target signal. The reverse current control prevents reverse current from flowing into the power supply during change of commutation state.

Hard drive spindle motor controller with reverse current prevention

A pulse width modulation controller for a hard disc drive spindle motor controls the rapid spin up of the spindle motor from a stop condition to normal operating speed using a multi-level peak current limiting and six state commutation. At the beginning of each commutation state, peak motor current is limited to less than its steady state peak value for a selected number of pulses. The peak current target then returns its normal level for the remainder of the commutation state. By reducing the peak current target for several pulses after each commutation state change, the effective supply current spike at commutation is reduced or eliminated.

Hard drive spindle motor controller with soft commutation

A motor controller for a three-phase spindle motor used in the hard disc drive provides pulse width modulated (PWM) signals used to drive the motor. The PWM signals have duty cycles which are a function of rotational position of the motor, a magnitude control signal, a stored set of main waveform coefficients, a stored set of modifier coefficients, and a modifier signal. By varying the modifier signal, the duty cycle of the PWM signals can be varied to adjust the shape of the motor current waveform to match the torque profile of the motor.

Programmable pulse width modulated waveform generator for a spindle motor controller

A motor drive circuit for a three-phase motor includes a commutator that provides a driving voltage to the motor from a DC voltage source. A sequencer operates the commutator to pulse width modulate the source voltage so that the driving current has a continuously variable waveform, such as a sinusoidal waveform. The sequencer is responsive to an error signal from a phase detector to align the driving voltage waveform with a motor current waveform. The phase detector includes a sensor that senses the motor current and provides a voltage input to first and second sample circuits. The first sample circuit provides a plurality of samples of respective instantaneous values of the sensed voltage, and the second sample circuit provides a sample of a selected instantaneous value of the sensed voltage. An error generation circuit provides an error signal based on a difference between the second sample and each of the plurality of first samples.

Double sampled phase detector circuit

A three-phase generator boost circuit for augmenting the back electromotive force produced by a spindle motor of a disk drive is disclosed. First and second nodes provide normal connection to a source of DC voltage for the spindle motor and a second motor connected between the first and second nodes. A commutator is connected to a sequencer to operate the spindle motor. In the event of catastrophic shutdown, two of the lower commutator switches are operated to short circuit the two stator coils having the highest and lowest voltages to store energy in the coils. The commutator switches are then operated to discharge current through the nodes to a storage capacitor for the second motor.

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Eagan, MN, United States of America

Michael Joseph Peterson