Micrel, Incorporated

Michael Joseph Mottola

Karl M Schlager

Martin E Garnett

Raymond David Zinn

Hiu Fung Ip

Lawrence R Sample

Marshall D Stone

The present invention is a method and circuitry for driving a high-threshold MOS device on low input voltages. The invention includes a circuit that operates on a supply voltage that is less than the threshold voltage of the high-threshold MOS device. The circuit includes one or more low threshold MOS inverters and one or more capacitors that operate at low input voltages. The one or more low threshold MOS inverters operate in a manner that the one or more capacitors get charged to a voltage greater than the low input voltage. Thereafter, the charged capacitor drives the high threshold MOS device.

Low leakage digital buffer using bootstrap inter-stage

A bandgap reference circuit utilizes differential transistors to generate a temperature-independent bandgap voltage. In place of conventional trim elements that are connected in parallel to and adjust the resistance values of the bandgap reference circuit, current control circuits are placed in the current paths passing through the differential transistors (i.e., connected to the critical nodes located at the terminals of the differential transistors). Each current control circuit includes a resistive 'trim' element (e.g., a zener diode) and associated trim pads that are separated from the critical nodes (i.e., the terminals of the differential transistors) by isolation transistors such that, during a trim/test procedure, the stray capacitances introduced by trim/test equipment probes are prevented from altering the performance of the bandgap reference circuit. In one embodiment, a current control circuit is connected to the critical node connected to the base of at least one of the differential transistors.

Bandgap reference circuits with isolated trim elements

A method of reducing the settling time of an amplifier includes providing a pre-set voltage on a high gain node of the amplifier when the amplifier is disabled. This pre-set voltage can be slightly less than the regulated voltage. In this manner, when the amplifier is enabled, the high gain node can quickly reach this regulated voltage. The pre-set voltage can be applied to the high gain node by operating a switch, e.g. if the amplifier is enabled (disabled), then the switch is open (closed). A startup circuit can generate the pre-set voltage. This startup circuit can include a startup current source and a transistor connected in series between VDD and VSS. The switch can be connected to the gate and drain of the transistor. Notably, the transistor can be the same type of device as the MOS device driven by the high gain node in the amplifier.

Amplifier turn-on speedup technique

An OTA driving an MOS device needs to turn it off quickly to minimize overshoot during a heavy to light load state. The drains of the MOS device can be used to accelerate turning off the MOS device. A first drain is connected to the gate of the MOS device. A second drain is connected to a base of a bipolar device. The emitter of the bipolar device is connected to the MOS device gate. Notably, this bipolar device is active during the heavy to light load state. Therefore, any current provided by the second drain is then multiplied by the beta of the bipolar device. The increased current generated on the emitter of the bipolar transistor and provided to the gate of the MOS device can advantageously accelerate the turnoff of that MOS device. The first drain can provide minimal additional current during the heavy to light load state.

Circuit and method for quickly turning off MOS device

A current sense resistor circuit using Kelvin connection sense features provides an average voltage across net sense resistance and average voltage across net reference resistance to be available at the Kelvin connection points. The Kelvin connections can be used by a negative feedback gain loop to hold the average current through respective reference elements and sense elements substantially constant.

Current sense resistor circuit with averaging Kelvin sense features

A bootstrap reference circuit includes a shunt regulator for generating a reference voltage at a first node, a current source generating a current, and a current mirror coupling the current to the shunt regulator for supplying the shunt regulator. In operation, when the shunt regulator is powering up, the current has an increasing magnitude when a voltage at the first node is less than a predefined voltage value where the predefined voltage value is less than the reference voltage. Furthermore, the current has a decreasing magnitude when the voltage at the first node is greater than the predefined voltage value. In one embodiment, the shunt regulator includes a bandgap reference circuit and the predefined voltage value is less than the bandgap voltage of 1.24 volts.

Bootstrap reference circuit including a shunt bandgap regulator with external start-up current source

Each die containing a resistive element which is to be trimmed has associated therewith a plurality of alignment targets. A cut mask having a trim pattern and an alignment key formed thereon is employed in a masking and etching step to trim the resistive element to a desired resistance. The number of links cut in the resistive element, and thus the final resistance thereof, depends on the particular positioning of the cut mask with respect to the die as determined by which of the alignment targets is aligned with the alignment key. For instance, aligning the alignment key with a first alignment target would result in cutting one link in the resistive element so as to achieve a first resistance value, while re-aligning the cut mask such that the alignment key aligns with another of the alignment targets would result in cutting two links in the resistive element so as to achieve a second resistance value. Since the trim of resistive elements may be adjusted to any one of many possible resistance values by simply changing the alignment of the cut mask with respect to the die, the need to have a separate cut mask for each of the possible trimmed resistance values is eliminated, thereby reducing costs.

Method of forming a resistor having a serpentine pattern through

In accordance with the present invention, trim pads used in trimming on-chip resistive elements are formed in the scribe channels interposed between respective dice on a wafer. Metal traces connect the trim pads to their associated resistive elements formed on the dice. Thus, each trim pad formed within the scribe channels results in a corresponding increase in the usable silicon surface area of the dice, thereby saving valuable silicon real estate.

Growing community of inventors

San Jose, CA, United States of America

Michael Joseph Mottola