Freescale Semiconductor,inc.

Semiconductor Components Industries, LLC

Nxp USA, Inc.

Michael J Zunino

John M Pigott

Olin L Hartin

Radu Mircea Secareanu

Qiang Li

Margaret Leslie Kniffin

Sateh Jalaleddine

Chuanzheng Wang

Colin McAndrew

William R Peterson, Ii

Zhichen Zhang

Qilin Zhang

Dmitry S Shipitsin

Vijay Parthasarathy

Shang-Hui Tu

An integrated circuit (IC) having a heat-generating element, such as a power MOSFET, a current-carrying conductor coupled to the heat-generating element, a sense conductor adjacent the current-carrying conductor, and a failure-detection circuit coupled to the sense conductor. When thermal cycling of the IC causes the resistance of the sense conductor to become greater than a temperature-dependent threshold value, the failure-detection circuit generates a signal indicating that the integrated circuit will soon fail. The resistance of the sense conductor is determined by injecting a current into the sense conductor to generate a voltage. The temperature-dependent threshold value is a voltage generated by injecting a current into a reference conductor disposed away from the current-carrying and sense conductors. A voltage comparator compares the two voltages to generate the output. Alternatively, the failure-detection circuit includes a processor that calculates the temperature-dependent threshold value from a temperature measurement taken on the integrated circuit.

Circuit for monitoring metal degradation on integrated circuit

An electronic apparatus includes a semiconductor substrate, a circuit block disposed in and supported by the semiconductor substrate and comprising an inductor, and a discontinuous noise isolation guard ring surrounding the circuit block. The discontinuous noise isolation guard ring includes a metal ring supported by the semiconductor substrate and a ring-shaped region disposed in the semiconductor substrate, having a dopant concentration level, and electrically coupled to the metal ring, to inhibit noise in the semiconductor substrate from reaching the circuit. The metal ring has a first gap and the ring-shaped region has a second gap.

Integrated circuit chip with discontinuous guard ring

A semiconductor device comprising a first inverter circuit including a first PMOS transistor and a first NMOS transistor, a drain electrode of the first PMOS transistor coupled to a drain electrode of the first NMOS transistor, and a second inverter circuit including a second PMOS transistor and a second NMOS transistor, a drain electrode of the second PMOS transistor coupled to a drain electrode of the second NMOS transistor. A first output voltage pad coupled to gate electrodes of the first and second PMOS and NMOS transistors, and between the drain electrode of the first PMOS transistor and the drain electrode of the NMOS transistor to self-bias the first inverter circuit. A second output voltage pad coupled between the drain electrode of the second PMOS transistor and the drain electrode of the second NMOS transistor.

MOFSET mismatch characterization circuit

In general, various embodiments of the present invention relate to systems and methods for simulating distributed effects by providing a meshing pattern () (e.g., a two-dimensional meshing pattern that is part of a recognition layer), applying that meshing pattern to the physical layout (), and partitioning the physical layout into a three-dimensional netlist () of components derived from the unit cells defined by the meshing pattern (), thereby modeling the parasitics within the design.

Methods and apparatus for simulating distributed effects

A semiconductor device (10) uses a plurality of floating field conductors (26, 28) to provide a substantially uniform electric field along the surface of the drift region (17) of the device (10). This substantially uniform electric field increases the breakdown voltage per unit length of the drift region (17).

Method of fabricating a semiconductor device having a floating field

Growing community of inventors

Tempe, AZ, United States of America

Michael J Zunino