Lsi Logic Corporation

Michael J Steidl

Jon M Long

Mark R Schneider

Sanjay Dandia

Bidyut Kanti Sen

Adrian S Murphy

Rachel S Sidorovsky

Aydin Koc

Improved manufacturability, yield, and reliability are achieved during wirebonding of a semiconductor die of reduced size by employing two rows of staggered conductive connectors, or bond pads, for wirebonding the die to a semiconductor package. An outer row of conductive connectors is positioned closer to the edge of the die than an inner row of conductive connectors and includes a greater number of connectors than the inner row. The die can be wirebonded to a package substrate having either a single row of bondfingers or multiple rows of bondfingers. In one embodiment, bond wires attaching the inner row of conductive pad connectors to the package substrate have a greater loop height than bond wires attaching the outer row of conductive pad connectors to the package substrate.

Semiconductor die with staggered bond pads

An integrated circuit having an outer ring of bonding pads which is positioned so as to be adjacent to and concentric with the perimeter of the integrated circuit. The outer ring of bonding pads extends for at least a first portion of the perimeter. An inner ring of bonding pads is positioned interior of, adjacent to, and concentric with the first ring of bonding pads. The inner ring of bonding pads extends for at least a second portion of the perimeter. The first portion is greater than the second portion, or in other words, the outer ring of bonding pads extends further around the integrated circuit than the inner ring of bonding pads. In addition, the outer ring of bonding pads has a greater number of bonding pads that the inner ring of bonding pads. Traces are electrically connected to the bonding pads of the inner and outer rings, such that each pad is electrically connected to a unique trace, meaning that each pad has a trace which is associated with just that pad and with no other pad. The pads of the inner and outer rings are staggered such that adjacent pads of the inner ring are separated by at least two of the traces which are connected to pads of the outer ring. By staggering the inner and outer rings of pads in this manner, pad density, ease of manufacture, and reliability are increased. By having the rings of pads progress around only a first and second portion of the perimeter of the integrated circuit, no space is taken up by bonding pads that are not required. For example, the outer ring of pads may extend all the way around the perimeter of the integrated circuit, and the inner ring of pads may only extend half way around the perimeter of the integrated circuit, because additional bonding pads are not required by the circuit.

Progressive staggered bonding pads

A semiconductor device package and a method of making such a package is described. The package comprises a flexible packaging substrate having a patterned metal layer onto which a semiconductor die is attached and a patterned insulative layer attached to the metal layer. The insulative layer includes an annular epoxy-seal gap. A glob of silicone gel is deposited and cured on the die. A casting frame is connected to the metal layer of the flexible substrate on the same side as the die. A backside moisture-blocking layer of material is attached to an opposed side of the tape. The frame and the backside layer are attached to the metal layer of the flexible substrate using cross-linkable epoxy adhesives. These epoxy adhesives join through the epoxy-seal gap to define an epoxy-seal around the die. A thermoset type of molding compound is then poured into the casting frame to define a moisture resistant package body.

Semiconductor device package and method of making such a package

A method of making a plastic-packaged semiconductor device, and mounting same to a printed circuit board is disclosed. The device has a body, and a plurality of leads extending from the body. Plastic webs are formed between adjacent leads for supporting the leads. Plastic bumps are formed at the ends of the webs, and align with recesses between conductors of wiring patterns on printed cirucit boards for aiding in alignment of the device with the board.

Method of making a plastic-packaged semiconductor device having lead

A plastic-packaged semiconductor device, method of making same, and mounting same to a printed circuit board is disclosed. The device has a body, and a plurality of leads extending from the body. Plastic webs are formed between adjacent leads for supporting the leads. Plastic bumps are formed at the ends of the webs, and align with recesses between conductors of wiring patterns on printed circuit boards, aiding in alignment of the device with the board.

Plastic-packaged semiconductor device having lead support and alignment

An improved method to assemble tape packaged integrated circuits includes spot welding a strip of TAB tape to a thin strip of copper called a strip carrier. The strip carrier provides mechanical rigidity to the tape during later processing, including die attachment and lead bonding and solder plating, as well as providing ESD protection since each tape lead is shorted to the strip carrier. The packaged die and the surrounding tape are excised from the strip carrier prior to final testing and the strip carrier is capable of being reused. The strip carriers are of a size and shape to be readily handled by existing integrated circuit handling equipment.

Growing community of inventors

San Jose, CA, United States of America

Michael J Steidl