Unisys Corporation

Michael J Saunders

Steven M O'Brien

Robert A Johnson

Edward A Miller

Eugene J Gretter

Sarah K Inforzato

Michael C Leap

Diane E Schaefer

Jeffery A Stell

Robert Buckwalter

Arthur J Nilson

Richard A Coffman, Jr

Kenneth A Kenton

Jared Poetter

George Karian

James R Hunter, Jr

James W Thompson

Joseph P Neill

Philip M Hoffman

Steven Clarke

Vincent S Yip

Richard Grzegorek

Dennis J Davidowski

Jayant S Pandya

Todd Little

A network model includes nodes, node property sets, authorization groups and authorization servers. The node property sets define how the nodes operate and authenticate. The nodes are member of the node property sets. The authorization groups are associated with the node property set. And, authorization servers are member of the authorization groups. In addition, a network model in a secure network environment has at least one community of interest. The network model includes at least one node being a member of a node property set that defines how the node operates and authenticates.

Network model utilizing property sets

A method of creating secure endpoints on a network includes registering by a node using a random selection algorithm to choose which server to register to; receiving by the node a property set ID of a property set that the node is a member of; and authorizing by the node using the property set ID to look up its authorization details in the property set. A method of creating secure endpoints on a secure network having at least one community of interest, includes registering by a node using a random selection algorithm to choose which server to register to; receiving by the node a property set ID of a property set that the node is a member of; and authorizing by the node through an authorization server using the property set ID to look up its authorization details in the property set; wherein the node and the authorization server are a member of the at least one community of interest.

Method of creating secure endpoints on a network

A method of dynamically allocating the amount of input/output (I/O) rate capacity to partitions in a computer system includes determining a total amount of I/O rate capacity and an economic value of each partition within the partitioned computer system. The economic value is defined as a performance-valued product established for each partition wherein the sum of all performance-value products for each partition defines a total economic value for the computer. The I/O rate to be allocated to each partition is calculated to be a portion of the total amount of I/O rate capacity where the portion allocated to each partition is proportional to the economic value of that respective partition. The calculated rate allocations are recorded in memory which is accessible to each partition. After recording, each partition regulates its I/O usage according to the recorded allocation.

Dynamic distribution of I/O resources in a partitioned computer system

The present invention provides systems and methods for allocating a pool of global memory among a set of client/servers so that storage volumes associated with a plurality of client/servers are each allocated a portion of the pool of global memory for caching of data from that volume. The amount of memory to be used for caching the volume's input/output operations (I/Os), the page size, the cache type, the cache replacement policy and the maximum cache read can be specified by volume. The amount of memory to be used for caching the volume's input/output operations, the cache type, the cache replacement policy and the maximum cache read I/O size can be changed dynamically by the changing volume-based attributes.

Disk volume virtualization block-level caching

A method and apparatus enables a newly installed peripheral device such as a disk device to be used with a computer system without changing the operating system. The peripheral device is identified as a type which is not recognized by an operating system operating in conjunction with the computer system. A value which identifies at least one logical attribute of said peripheral device is obtained from said peripheral device. A determination is made as to whether the operating system and the peripheral device are compatible based on the logical attribute obtained from the peripheral device. The operating system and the peripheral device communicate if it is determined that the operating system and the peripheral device are compatible (i.e., can operate together).

Self-identifying peripheral device

A mainframe computing system is adapted to be loaded with one of a plurality of different operating systems and different associated microcode to provide a computing system which is capable of running user programs adapted to be executed by the loaded operated system comprises a main memory for receiving the desired operating system coupled to a system bus. An instruction processor and an input/output control processor are coupled to the system bus and are provided with an instruction register for presenting user program instructions to the processors. The processor means have associated therewith microcode storage memory which receive and store a set of microcode instructions to be performed by the processors according to the program instruction stored in the instruction register. The stored microcode comprises primary microcode instructions to carry out each of the instructions in the instruction register means. No compiling or emulation is necessary to provide a software configurable computing system adapted to run user programs according to one of a plurality of operating systems loadable in the main memory.

Dual operating system computer

An apparatus for enhancing the operation of a M byte instruction word CPU when operating user programs on an N byte instruction word CPU. The M-Byte instruction word CPU is provided with an N-Byte instruction register and a main memory for supplying N-Byte instruction words or M-Byte instruction words to said N-Byte instruction register. An operational code multiplexer and an parameter code multiplexer are connectable to selective outputs of said instruction register so that any one of the M-Bytes may be selected as an operational code and any one of the remaining M-Bytes may be selected as parameter code bytes, and selection means including sequencer means are provided for operating the operational code multiplexer and the parameter code multiplexer in an M-Byte instruction word CPU mode of operation or as an N-Byte instruction word CPU mode of operation.

N-byte stack-oriented CPU using a byte-selecting control for enhancing a

The present invention provides a novel programmable data communications controller employed to accept data from a host computing system and for transmitting the data to a terminal designated by the host computer system. The data computer communications controller is further provided with protocols, parameters and poll tables stored in a dedicated memory of the data communications controller which enables the controller to receive data and address information from a main memory of a host computer and to reformat and pre-package the information in a protocol format block acceptable by a terminal coupled to the data communications controller. Different protocols, parameters and polls are provided in the data communications controller in the form of preprogrammed information which enables different terminals employing different protocols and protocol formats to be coupled directly to a data link interface bus without hardware modifications. Different protocols are loaded into the main memory of the main computer system and down loaded into the bit map memory of the data communications controller upon initialization of the system.

Programmable data communications controller

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Norristown, PA, United States of America

Michael J Saunders