Qorvo US, Inc.

Cirrus Logic Inc.

Michael J Murphy

Michael R Kay

Nadim Khlat

Jeffrey D Potts

Aleksey Sergeyevich Khenkin

A thin-film resistor circuit for an integrated circuit provides low resistance by segmenting a thin-film resistor to provide a wider effective thin-film resistor in a smaller die. The die includes a substrate, multiple electronic devices integrated on the substrate and interconnected to form at least a portion of an electronic circuit, a plurality of interconnect lands arranged in a grid that interconnect the devices with external terminals, and a thin-film resistor implemented by two or more thin-film resistor segments that operate in parallel in the circuit. The segments are disposed between different pairs of adjacent columns of the grid interconnect lands, with one of the thin-film resistor segments electrically connected along its width to lands of a first column of the grid of interconnect lands, and another one of the thin-film resistor segments is electrically connected along its width to lands of a second column of the grid interconnect lands.

Segmented-width thin-film sense resistors with width-distributed terminal land connections

The present disclosure discloses a direct current (DC)-DC boost converter, which includes a battery terminal providing a battery voltage, a charge pump coupled between the battery terminal and an interior node, and a power inductor coupled between the interior node and a power supply terminal that provides a power voltage to a radio frequency transceiver. The charge pump is configured to provide an interior voltage at the interior node based on the battery voltage. Herein, the interior voltage toggles between the battery voltage and two times the battery voltage. The charge pump includes a first switch coupled between the battery terminal and the interior node, a second switch coupled between the battery terminal and a connecting node, a third switch coupled between the connecting node and ground, and a flying capacitor coupled between the interior node and the connecting node of the second switch and the third switch.

DC-DC boost converter

A switch controller for charge pump tracker circuitry is disclosed. The switch controller includes first monitoring circuitry configured to monitor a first voltage across a first flying capacitor during a first discharging phase. A second monitoring circuitry is configured to monitor a second voltage across a second flying capacitor during a second discharging phase. Further included is boost logic circuitry in communication with the first monitoring circuitry and the second monitoring circuitry, wherein the boost logic circuitry is configured in response to control a first switch network coupled to the first flying capacitor and a second switch network coupled to the second flying capacitor so that the first discharging phase and the second discharging phase alternate in an interleaved mode, and so that the first discharging phase and the second discharging phase are in phase during a parallel boost mode.

Charge pump tracker circuitry

A switching regulator system having a switching regulator configured to generate regulated voltage pulses at a switching output in response to a setpoint of an output voltage at a setpoint input and feedback of the output voltage at a feedback input is disclosed. A power inductor is coupled between the switching output and a filtered output, and a filter capacitor is coupled between the filtered output and a fixed voltage node. A transistor having a control input is coupled between the filtered output and the fixed voltage node. A transition comparator has a first comparator input coupled to the setpoint input, a second comparator input coupled to the feedback input, and a comparator output coupled to the control input, wherein the transition comparator is configured to monitor for a setpoint voltage dropping below a feedback voltage and in response turn on the transistor to discharge the filter capacitor.

Switching regulator system with transition detection and filter capacitor discharge circuitry

A multi-level charge pump (MCP) circuit is provided. The MCP circuit includes a multi-level voltage circuit configured to receive a supply voltage and generate a low-frequency voltage. The multi-level voltage circuit includes a first switch path, a second switch path, and a third switch path each having a respective on-resistance and coupled in parallel between an input node and an output node. In a non-limiting example, the multi-level voltage circuit is configured to activate the first switch path and at least one of the second switch path and the third switch path when the multi-level voltage circuit generates the low-frequency voltage that equals the supply voltage. By activating at least two of the three switch paths to generate the low-frequency voltage, it may be possible to reduce an equivalent resistance of the multi-level voltage circuit, thus helping to improve efficiency and reduce power loss of the MCP circuit.

Multi-level charge pump circuit

Charge pump tracker circuitry is disclosed having a first switch network configured to couple a first flying capacitor between a voltage input terminal and a ground terminal during a first charging phase and couple the first flying capacitor between the voltage input terminal and a pump output terminal during a first discharging phase. A second switch network is configured to couple a second flying capacitor between the voltage input terminal and the ground terminal during a second charging phase and couple the second flying capacitor between the voltage input terminal and the pump output terminal during a second discharging phase. A switch controller is configured to monitor first and second voltages across the first and second flying capacitors, respectively, during the first and second discharging phases and in response to control the first and second switch networks so that the first the second discharging phases alternate in an interleaved mode.

A power switch with a bootstrap driver for continuous time operation is disclosed. In an exemplary aspect, the power switch selectively connects power management circuitry to one or more power amplifier stages in a radio frequency (RF) front end. The bootstrap driver provides a constant gate to source voltage during an enabled state of the power switch such that a switching element can remain closed with near-constant closed switch resistance in the presence of varying signals (e.g., varying power signals) passing through the power switch. The bootstrap driver can use a variable clock frequency to quickly close the power switch and resistor-capacitor (RC) filtering to reduce noise contribution to the signal path through the power switch. In some examples, a constant voltage reference provides battery independent voltage control of the gate to source voltage of the power switch.

Power switch with bootstrap driver for continuous time operation

A multi-mode power management circuit is provided. The multi-mode power management circuit includes a second generation (2G) amplifier circuit(s) configured to amplify a 2G radio frequency (RF) signal for transmission in a 2G RF band(s). The multi-mode power management circuit includes a pair of tracker circuitries coupled to the 2G amplifier circuit. Each tracker circuitry includes a charge pump circuitry configured to generate a voltage and a current. When the 2G amplifier circuit amplifies the 2G RF signal for transmission in the 2G RF band(s), both charge pump circuitries are controlled to provide two currents to the 2G amplifier circuit. As a result, the 2G amplifier circuit is able to amplify the 2G RF signal to a higher power corresponding to a sum of the two currents for transmission in the 2G RF band(s).

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Statesville, NC, United States of America

Michael J Murphy