Intel Corporation

Other

Michael J Hill

William J Lambert

Kaladhar Radhakrishnan

Krishna Bharath

Beomseok Choi

Zhichao Zhang

Sanka Ganesan

Sri Chaitra Jyotsna Chavali

Huong T Do

Srikrishnan Venkataraman

Zhenguo Jiang

Anne Augustine

Stephen Andrew Smith

Kemal Aygun

Mathew J Manusharow

Jonathan P Douglas

Sriram Srinivasan

Dong Zhong

Gregorio R Murtagian

Alexander Slepoy

Bhanu Jaiswal

Kimberly Dawn Eilert

Hector A Aguirre Diaz

Digvijay Ashokkumar Raorane

Thomas M Annau

Assaf Benhamou

Todd W Mellinger

Jin Zhao

Scott M Mokler

Bryan Ulrich McClain

Demetrius Madrigal

Leigh E Wojewoda

Weimin Shi

Siddharth Kulasekaran

Daniel Nicholas Peknik

Paul K Tucker

Ladd D Campbell

Juan Landeros, Jr

Ahmed Fouad Salama

Embodiments disclosed herein include two stage voltage regulators for electronic systems. In an embodiment, a voltage regulator comprises a switched capacitor voltage regulator (SCVR). In an embodiment, the SCVR receives a first voltage as an input and outputs a plurality of SCVR output voltages. In an embodiment, the voltage regulator further comprises a low-dropout (LDO) regulator. In an embodiment, the LDO regulator receives one or more of the plurality of SCVR output voltages as LDO input voltages, and where the LDO regulator outputs a second voltage.

Two stage multi-input multi-output regulator

Disclosed herein are integrated circuit (IC) structures that may be included in package substrates. For example, disclosed herein are passive components in package substrate, wherein the passive components include at least one non-circular via and at least one pad in contact with the at least one non-circular via, and the passive components include an inductor or a capacitor. Other embodiments are also disclosed.

Integrated circuit structures in package substrates

Embodiments include a microelectronic device package structure having an inductor within a portion of a substrate, wherein a surface of the inductor is substantially coplanar with a surface of the substrate. One or more thermal interconnect structures are on the surface of the inductor. A conductive feature is embedded within a board, where a surface of the conductive feature is substantially coplanar with a surface of the board. One or more thermal interconnect structures are on the surface of the conductive feature of the board, where the thermal interconnect structures provide a thermal pathway for cooling for the inductor.

Package substrate inductor having thermal interconnect structures

An apparatus includes a substrate, one or more integrated circuit dies on the substrate, and a stiffener affixed to the substrate. One or more sections of the stiffener may includes a magnetic material. The apparatus further includes an inductive circuit element comprising one or more conductive structures wrapped around the magnetic material. In some examples where a first coil is wrapped around a first section of the stiffener, and a second coil is wrapped around a second section of the stiffener, current supplied to the first coil generates at the second coil a current that is further transmitted to the one or more semiconductor dies.

Apparatus and system with package stiffening magnetic inductor core and methods of making the same

Embodiments include a microelectronic device package structure having an inductor within a portion of a substrate, wherein the inductor is at least partially embedded within the substrate. One or more thermal vent structures extend through at least one of the substrate or a board attached to the substrate. The one or more thermal vent structures provide a thermal pathway for cooling for the inductor.

Package structure having substrate thermal vent structures for inductor cooling

An apparatus is provided which comprises: a first set of one or more contacts on a first die surface, the first set of one or more contacts to couple with contacts of an integrated circuit die, one or more multi-level voltage clamps coupled with the first set of one or more contacts, the one or more multi-level voltage clamps switchable between two or more voltages, one or more integrated voltage regulators coupled with the one or more multi-level voltage clamps, the one or more integrated voltage regulators to provide an output voltage, one or more through silicon vias (TSVs) coupled with the one or more integrated voltage regulators, and a second set of one or more contacts on a second die surface, opposite the first die surface, the second set of one or more contacts coupled with the one or more TSVs, and the second set of one or more contacts to couple with contacts of a package substrate. Other embodiments are also disclosed and claimed.

Multi-level distributed clamps

Embodiments include a microelectronic device package structure having an inductor at least partially embedded within a substrate. At least one thermal solution structure may be on a surface of the inductor, and may be thermally coupled with the inductor. The one or more thermal solution structures provide a thermal pathway for cooling for the inductor, and extend a thermal time constant of the inductor.

Package inductor having thermal solution structures

Techniques and mechanisms for mitigating damage to voltage regulator (VR) circuitry of a packaged device. In an embodiment, the VR circuitry comprises a circuit leg between a first node and a second node. During a burn-in process, the VR circuitry provides a regulated output voltage to a load circuit via the first node, wherein the output voltage is based on a supply voltage received via the second node. While the VR circuitry provides the regulated output voltage to the load circuit, a supply current is provided to the load circuit via a path which is independent of any leg which is between the first node and the second node. In another embodiment, an integrated circuit (IC) chip of the packaged device comprises the load circuit, and the leg further comprises an off-chip coil structure which is distinct from the IC chip.

Method, device and system to protect circuitry during a burn-in process

An adjustable inductance system includes a plurality of inductor modules coupled to a corresponding plurality of loads and a pool of at least one floating inductor module that may be coupled in parallel with any one of the plurality of inductor modules. A control circuit monitors the current drawn through the inductor module by the load. If current draw exceeds a threshold, the control circuit couples a floating inductor module to the load. Using the current drawn by the load, the control circuit determines an appropriate inductance value and determines an appropriate inductor configuration for the inductor module, the floating inductor module, or both the inductor module and the floating inductor module to achieve the determined inductance value. The control circuit causes switching elements to transition to a state or position to achieve the inductor configuration.

Reconfigurable inductor

Described is an apparatus which comprises: a first voltage regulator (VR) coupled to first one or more inductors, the first VR is to provide power to a first power domain; and a second VR coupled to second one or more inductors at least one of which is inductively coupled to at least one of the first one or more inductors, the second VR is to provide power to a second power domain separate from the first power domain, wherein there is a non-zero phase angle offset between switching transistors of the first VR relative to the second VR.

Apparatus and method to reduce power losses in an integrated voltage regulator

Embodiments of the invention include a printed circuit board (PCB) assembly that includes advanced component in cavity (ACC) technology and methods of forming such PCB assemblies. In one embodiment, the PCB assembly may include a PCB that has a cavity formed on a first surface of the PCB. A plurality of contacts may be formed in the cavity. The cavity provides a location where components may be electrically coupled to the PCB. Additionally, a package that is mounted to the PCB may extend over the cavity. Since the package passes directly over the component, the components may be used to electrically couple the package to one or more of the contacts formed in the cavity. Accordingly, embodiments of the invention allow for the surface area used for components to be reduced, and also improves electrical performance of the PCB assembly by positioning the components proximate to the package.

Development of the advanced component in cavity technology

An apparatus system is provided which comprises: a first component to receive a first signal via a first delay circuit; a second component to receive a second signal via a second delay circuit; and one or more circuitries to tune a first delay of the first delay circuit and a second delay of the second delay circuit, based at least in part on monitoring of a voltage level.

Tunable delay control of a power delivery network

Growing community of inventors

Gilbert, AZ, United States of America

Michael J Hill