Fed Corporation

International Business Machines Corporation

Michael J Costa

Gary W Jones

Steven M Zimmerman

Jeffrey A Silvernail

Susan K Schwartz Jones

Jeffrey R Marino

Susan K Jones

Yachin Liu

Malvin S Bilsback

Joseph K Ho

R Mark Boysel

Jesse B Shapiro

A field emitter device includes a column conductor, an insulator, and a resistor structure for advantageously limiting current in a field emitter array. A wide column conductor is deposited on an insulating substrate. An insulator is laid over the column conductor. A high resistance layer is placed on the insulator and is physically isolated from the column conductor. The high resistance material may be chromium oxide or 10%-50% wt % Cr+SiO. A group of microtip electron emitters is placed over the high resistance layer. A low resistance strap interconnects the column conductor with the high resistance layer to connect in an electrical series circuit the column conductor, the high resistance layer, and the group of electron emitters. One or more layers of insulator and a gate electrode, all with cavities for the electron emitters, are laid over the high resistance material. One layer of insulator is selected from a group of materials including SiC, SiO, and Si.sub.3 N.sub.4. An anode plate is attached with intermediate space between the anode plate and the microtip electron emitters being evacuated.

Field emitter device with a current limiter structure

A microelectronic field emitter device comprising a substrate, a conductive pedestal on said substrate, and an edge emitter electrode on said pedestal, wherein the edge emitter electrode comprises an emitter cap layer having an edge. The invention also contemplates a current limiter for a microelectronic field emitter device, which comprises a semi-insulating material selected from the group consisting of SiO, SiO+Cr (0 to 50% wt.), SiO2+Cr (0 to 50% wt.), SiO+Nb, Al2O3 and SixOyNz sandwiched between an electron injector and a hole injector. Another aspect of the invention relates to a microelectronic field emitter device comprising a substrate, an emitter conductor on such substrate, and a current limiter stack formed on said substrate, such stack having a top and at least one edge, a resistive strap on top of the stack, extending over the edge in electrical contact with the emitter conductor; and an emitter electrode on the current limiter stack over the resistive strap.

Pedestal edge emitter and non-linear current limiters for field emitter

A planarization method for use during manufacture of a microelectronic field emitter device, comprising applying a glass frit slurry including glass particles in a removable base, and subsequently baking to liquify the frit. The invention relates in another aspect to a method of making a microelectronic field emitter device, comprising the steps of: applying a patterned layer of liftoff profile resist over a substrate to define emitter conductor locations; employing the patterned resist layer to form trenches in the substrate at the emitter conductor locations; depositing emitter conductor metal in the trenches and over the patterned resist layer; removing the patterned resist layer; depositing a current limiter layer over the conductors and substrate areas between trenches; depositing a layer of emitter material; pattern masking and etching the layer of emitter material to form emitter structures; depositing gate dielectric; applying a patterned layer of liftoff profile resist over the gate dielectric; evaporating gate metal; and removing the patterned resist layer to define gate electrodes.

Planarizing process for field emitter displays and other electron source

A one sided a.c. plasma panel comprises a glass substrate encapsulated within a pair of glass plates dividing the panel into two interconnected chambers. One set of conductor arrays originate within the rear aperture are are conducted through display vias to circular electrodes in the front aperture. The second set of electrodes comprise annular rings which are concentric and coplanar with the circular electrodes. This configuration limits discharge spread on the display surface, permitting increased resolution without crosstalk. Multicolor capability is provided by the combination of ultraviolet sensitive phosphors on the inner surface of the front faceplate and an ultraviolet emitting gas within the plasma panel.

Concentric via plasma panel

A gas discharge display panel may be used for display purposes despite the presence of open conductors in the panel. Four termination areas, each including a plurality of repair pads are provided, one at each end of each of the two conductor arrays in the panel. One end of each conductor in each array is connected to a respective repair pad in the adjacent termination area. A repair cable having a plurality of conductors runs from the termination area at one end of a conductor array to the termination area at the other end of the array. To repair an open, opposite ends of a respective repair cable conductor are connected to the open conductor's repair pads. By virtue of the connection of the opposite ends of a repair cable conductor to the open conductor's repair pads, both ends of the open conductor are electrically connected. When an open conductor is energized at one end, the entire body of the open conductor is at the same electrical potential despite the presence of the open. In a preferred embodiment, the repair cable comprises a plurality of conductors partially embedded in a thermosetting adhesive.

Growing community of inventors

Poughkeepsie, NY, United States of America

Michael J Costa