Hewlett-packard Company

Michael J Bennett

Robert W Proulx

John G Rohrbaugh

Thomas H Baker

Mercedes E Gil

Jack D Benzel

David C Moh

Mercedes P Gil

The present invention is a method for accessing a user defined custom routine through a graphical interface of an application program. The method comprises the steps of: (a) linking the user defined custom routine to the application program; (b) displaying a means for accessing the user defined custom routine on a graphical interface; and (c) transferring control to the user defined custom routine when a user activates the means.

Apparatus and method for mapping a custom routine to an interface button

Enhanced capability design-rule halos for use in Computer Aided Design (CAD) software programs are described. Such enhanced halos, created around a design feature at the design rule distance from that feature, have the following characteristics: beveled corners for closer placement of adjacent non-parallel and/or non-perpendicular design features, level-to-level design rule halos, following a bend or turn in a design feature, the design rule halo automatically adapts to bends or turns in the design feature and associated changes in the design feature following the bend, following a bend or turn in a design feature, the design feature and the design rule halo automatically snap back, as required, to avoid a design rule violation with respect to an adjacent design feature, and the design-rule halo is prevented from extending closer to an adjacent design feature than the design rule distance. These actions are performed real-time and interactively.

Forced conformance design-rule halos for computer aided design software

Multilevel and beveled-corner design-rule halos for computer aided

Adjustable and snap back design-rule halos for computer aided design

A scan controllable, programmable fuse circuit is provided to enable testing of an integrated circuit in its final configuration before blowing any of the fuses of the programmable fuse circuits. This is achieved by incorporating a scannable latch that is connected to the output of a programmable fuse circuit and is configured for loading the output value of the programmable fuse circuit. The output value is then latched to the output of the scannable latch. Alternatively, a programmed output value can be scanned into the scannable latch and then latched to the output of the scannable latch.

System and method for scan control of a programmable fuse circuit in an

A programmable fuse circuit is provided with a disabling static current path. The fuse logic circuit includes a controllable switch, load device, and at least one fuse, all of which are connected in a series so as to share a static current path. The controllable switch is preferably a transistor and can be selectively controlled to enable or disable the current path of the programmable fuse circuit. Therefore, by providing the ability to disable the static current path of programmable fuse circuit without having to blow the fuse makes the programmable fuse circuit static current testable. Other applications for the programmable fuse circuit include, for instance, providing a serial number to integrated circuits.

System and method for disabling static current paths in fuse logic

A system comprises a flag interface module, a flag query having a selectable value based on a user authorization level, a query communicator, and a flag value communicator for communicating a new flag value from the flag interface module to a test program in response to the query communicator that enables a user to modify an execution sequence [e.g., modifying the flow] of the test program executing on a computer controlling a testing system. The execution sequence of the test program is modified only if the user has a proper authorization level. The execution sequence is modified by an authorized user without requiring the test program to be recompiled.

Apparatus and method for changing the behavior of a computer program

The present invention is a method for specifying test flow and binning of an integrated circuit part in an integrated circuit tester. The method comprises the steps of receiving descriptions of the tests, receiving test flow statements indicating when the tests are to be executed, receiving binning statements, executing the tests as indicated by the test flow statements, and binning the IC device as indicated by the results of the tests.

Apparatus and method for specifying the flow of test execution and the

The invention is a method for displaying wafer test results from an integrated circuit tester in real time. The method comprising the steps of: (a) receiving wafer dimensions and die dimensions from a wafer handler; (b) creating a template representative of a wafer having cells representative of a die from the wafer dimensions and the die dimensions; (c) displaying the template; (d) invoking a tester to test a selected die of a selected wafer; (e) receiving test results from the tester; (f) displaying the test results on a selected cell which corresponds to the selected die; and (g) repeating steps (d)-(f) as required.

Apparatus and method for displaying wafer test results in real time

The invention is a method for enabling a user to enter wafer numbers into a computer-based integrated circuit production test system. The method comprises the steps of: (a) prompting the user for the wafer numbers; (b) displaying the wafer numbers in a graphical representation of a wafer cassette; (c) enabling the user to edit the wafer numbers on the graphical representation; and (d) transmitting the wafer numbers to the computer-based IC production test system.

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Timnath, CO, United States of America

Michael J Bennett