Infineon Technologies Austria Ag

Infineon Technologies Ag

Infineon Technologies Americas Corp.

Michael Hutzler

Ralf Siemieniec

Oliver Blank

David Laforet

Li Juin Yip

Franz Hirler

Cedric Ouvrard

Anton Mauder

Markus Zundel

Martin Poelzl

Johannes Baumgartl

Martin Henning Vielemeyer

Maximilian Roesch

Stefan Sedlmaier

Ingmar Neumann

Adam Amali

Gilberto Curatola

Gerhard Noebauer

Thomas Feil

Georg Ehrentraut

Gianmauro Pozzovivo

Heimo Hofer

Harsh Naik

Christoph Gruber

Thomas Ralf Siemieniec

Roland Moennich

Michael Roesner

Olaf Storbeck

Matthias Kuenle

Stefan Krivec

Joachim Hirschler

Markus Heinrici

Mathias Plappert

Christof Altstaetter

Cédric Ouvrard

Christoffer Erbert

Laszlo Juhasz

Klaus Goeschl

Wolfgang Koell

In an embodiment, a transistor device a semiconductor substrate having a main surface, and a cell field including a plurality of transistor cells of a power transistor. The cell field further includes: a body region of a second conductivity type; a source region of a first conductivity type on or in the body region, the first conductivity type opposing the second conductivity type; a gate trench in the main surface of the semiconductor substrate; a gate dielectric lining the gate trench; a metal gate electrode arranged in the gate trench on the gate dielectric; and an electrically insulating cap arranged on the metal gate electrode. A method of fabricating a gate of the transistor device is also described.

Transistor device having a cell field and method of fabricating a gate of the transistor device

The application relates to a semiconductor transistor device, having a source region, a body region including a channel region extending in a vertical direction, a drain region, a gate region arranged aside the channel region in a lateral direction, and a body contact region made of an electrically conductive material, wherein the body contact region forms a body contact area, the body contact region being in an electrical contact with the body region via the body contact area, and wherein the body contact area is tilted with respect to the vertical direction and the lateral direction.

Semiconductor transistor device having a titled body contact area and method of manufacturing the same

A method of producing a semiconductor device includes: forming, in a semiconductor substrate, a drift region of a first conductivity type, a body region of a second conductivity type above the drift region, and a source region of the first conductivity type separated from the drift region by the body region; forming rows of spicular-shaped field plate structures in the semiconductor substrate, the spicular-shaped field plate structures extending through the source region and the body region into the drift region; forming stripe-shaped gate structures in the semiconductor substrate and separating adjacent rows of the spicular-shaped field plate structures; and forming a current spread region of the first conductivity type below the body region in semiconductor mesas between adjacent ones of the spicular-shaped field plate structures and which are devoid of the stripe-shaped gate structures, the current spread region configured to increase channel current distribution in the semiconductor mesas.

Method of producing a semiconductor device having spicular-shaped field plate structures and a current spread region

Semiconductor transistor device and method of manufacturing the same

In an embodiment, a transistor device includes a semiconductor substrate having a main surface, a cell field including a plurality of transistor cells, and an edge termination region laterally surrounding the cell field. The cell field includes a gate trench in the main surface of the semiconductor substrate, a gate dielectric lining the gate trench, a metal gate electrode arranged in the gate trench on the gate dielectric, and an electrically insulating cap arranged on the metal gate electrode and within the gate trench.

Transistor device and method of fabricating a gate of a transistor device

A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a gate structure extending from a first surface into the semiconductor substrate, a plurality of needle-shaped first field plate structures extending from the first surface into the semiconductor substrate, body regions of a second conductivity type, and source regions of a first conductivity type formed between the body regions and the first surface. The inner termination region surrounds the transistor cell region and includes needle-shaped second field plate structures extending from the first surface into the semiconductor substrate. The needle-shaped first field plate structures are arranged in a first pattern and the needle-shaped second field plate structures are arranged in a second pattern.

Semiconductor device having a transistor cell region and a termination region with needle-shaped field plate structures

A semiconductor device includes a semiconductor body having first and second opposing surfaces, an active area including active transistor cells, and an edge termination region laterally surrounding the active area. Each active transistor cell includes a mesa and a columnar trench having a field plate. The edge termination region includes inactive cells each including a columnar termination trench having a field plate, and a termination mesa including a drift region of a first conductivity type. The edge termination region includes a transition region laterally surrounding the active region and an outer termination region laterally surrounding the transition region. In the transition region, the termination mesa includes a body region of a second conductivity type arranged on the drift region. In the outer termination region, the drift region extends to the first surface. A buried doped region of the edge termination region is positioned in the transition and outer termination regions.

Semiconductor device

In one aspect, a method of forming a silicon-insulator layer is provided. The method includes arranging a silicon structure in a plasma etch process chamber and applying a plasma to the silicon structure in the plasma etch process chamber at a temperature of the silicon structure equal to or below 100&#xb0; C. The plasma includes a component and a halogen derivate, thereby forming the silicon-insulator layer. The silicon-insulator layer includes silicon and the component. In another aspect, a semiconductor device is provided having a silicon-insulator layer formed by the method.

Methods of forming a silicon-insulator layer and semiconductor device having the same

A semiconductor device includes: a semiconductor substrate having a drift region of a first conductivity type, a body region of a second conductivity type formed above the drift region, and a source region of the first conductivity type separated from the drift region by the body region; rows of spicular-shaped field plate structures formed in the semiconductor substrate, the spicular-shaped field plate structures extending through the source region and the body region into the drift region; stripe-shaped gate structures formed in the semiconductor substrate and separating adjacent rows of the spicular-shaped field plate structures; and a current spread region of the first conductivity type formed below the body region in semiconductor mesas between adjacent ones of the spicular-shaped field plate structures and which are devoid of the stripe-shaped gate structures. The current spread region is configured to increase channel current distribution in the semiconductor mesas.

Semiconductor device with spicular-shaped field plate structures and a current spread region

A semiconductor device includes a semiconductor substrate, a transistor cell region formed in the semiconductor substrate and an inner termination region formed in the semiconductor substrate and devoid of transistor cells. The transistor cell region includes a plurality of transistor cells and a gate structure that forms a grid separating transistor sections of the transistor cells from each other, each of the transistor sections including a needle-shaped first field plate structure extending from a first surface into the semiconductor substrate. The inner termination region surrounds the transistor cell region and includes needle-shaped second field plate structures extending from the first surface into the semiconductor substrate. The first field plate structures form a first portion of a regular pattern and the second field plate structures form a second portion of the same regular pattern.

Semiconductor device with needle-shaped field plate structures

A power semiconductor die conducts a load current between front and back side load terminals. The die includes an active region with a plurality of columnar trench cells. Each columnar trench cell includes: a section of a drift zone, a section of a channel zone and a section of a source zone, the channel zone section being electrically connected to the front side load terminal and isolating the source zone section from the drift zone section; and a control section with at least one control electrode in a control trench. An edge termination region between the die edge and the active region includes a front side zone configured to have an electrical potential different from an electrical potential of the front side load terminal. An isolating trench structure is arranged between the front side zone and the channel zone which is electrically connected to the front side load terminal.

Layout for needle cell trench MOSFET

A semiconductor device includes a semiconductor substrate having drift and body regions. The drift region includes upper and lower drift regions. An active area includes a plurality of spicular trenches extending through the body region and into the drift region. Each spicular trench in the active area has a lower end which together define a lower end of the upper drift region extending towards a first side and a lower drift region extending from the lower end of the upper drift region towards a second side. The edge termination area includes spicular termination trenches extending at least into the upper drift region. A surface doping region arranged in the upper drift region in the edge termination area extends to the first side, is spaced apart from the lower end of the upper drift region, and has a net doping concentration lower than that of the upper drift region.

Semiconductor device having an edge termination area with trench electrodes at different electric potentials, and method for manufacturing thereof

Semiconductor device having a reduced surface doping in an edge termination area, and method for manufacturing thereof

In an embodiment, a semiconductor device is provided that includes a semiconductor body having a first conductivity type, a first major surface and a second major surface opposite the first major surface, a gate arranged on the first major surface, a body region having a second conductivity type opposite the first conductivity type, the body region extending into the semiconductor body from the first major surface, a source region having the first conductivity type, the source region being arranged in the body region, a buried channel shielding region having the second conductivity type, a contact region having the second conductivity type, and a field plate arranged in a trench extending into the semiconductor body from the first major surface.

Semiconductor device and method for fabricating a semiconductor device

According to an embodiment of a power semiconductor device, the device includes a semiconductor body coupled to a first load terminal and a second load terminal and configured to conduct a load current between the first load terminal and the second load terminal. A trench extends into the semiconductor body along an extension direction and includes an insulator. A first electrode structure included in the trench is configured to control the load current. A second electrode structure included in the trench is arranged separately and electrically insulated from the first electrode structure. The first electrode structure and the second electrode structure are spatially displaced from each other along the extension direction such that they do not have a common extension range along the extension direction. Each of the first electrode structure and the second electrode structure is made of a metal.

Power semiconductor device having a trench with control and field electrode structures

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Villach, Austria

Michael Hutzler