Nvidia Corporation

University of Houston System

Marina Biotech, Inc.

Michael Houston

Elad Mentovich

Steven C Quay

Mary Gallagher Prieve

Ryan Kelsey Albright

Benjamin Goska

Siddha Ganju

Pierrot Harvie

Boris Ginsburg

Roger C Adami

Shaguna Seth

Kathy L Fosnaugh

Alex Fit-Florea

Renata Fam

Amir Gholaminejad

Slawomir Kierat

Sergei Nikolaev

Ahmad Kiswani

Hao Wu

Yingchun Zhang

Nicholas Dias

Theresa M Spitznagle

Yang Liu

Henry Lai

Christopher Smith

Christopher P Smith

Aspects of the present invention are directed to computer-implemented techniques for improving the training of artificial neural networks using a reduced precision (e.g., float16) data format. Embodiments of the present invention rescale tensor values prior to performing matrix operations (such as matrix multiplication or matrix addition) to prevent overflow and underflow. To preserve accuracy throughout the performance of the matrix operations, the scale factors are defined using a novel data format to represent tensors, wherein a matrix is represented by the tuple X, where X=(a, v[.]), wherein a is a float scale factor and v[.] are scaled values stored in the float16 format. The value of any element X[i] according to this data format would be equal to a*v[i].

Tensor processing using low precision format

Systems and methods herein address power for one or more processing units, using one of a plurality of power profiles during execution of a group of real-time instructions, the one of the plurality of power profiles determined based in part on a relationship determined between the one of the plurality of power profiles and a power profile of the group of real-time instructions, the relationship limited by a threshold, and the plurality of power profiles are associated with a plurality of groups of reference instructions.

Instruction prefetch based power control

Growing community of inventors

Saratoga, CA, United States of America

Michael Houston