Advanced Micro Devices Corporation

Polycom, Inc.

Legerity, Inc.

Michael Hogan

Larry David Hewitt

David E Norris

Dale E Gulick

David N Suggs

Glen W Brown

Martin P Soques

Paul G Schnizlein

Alfredo R Linz

Carlin D Cabler

Geoffrey E Brehmer

Michael E Spak

Jeffrey M Blumenthal

Ryan E Feemster

David J Guercio

Alan T Torok

Wayne Grosvenor Dunlap

DahRenn Ba

Rick VanderKam

Samantha Kha

Oden J McMillan

Kristin Dunn

Dele E Gulick

A multimedia distribution device includes an embedded stream encoder and an embedded stream server for encoding and transmitting, through utilization of streaming technology, audio and video content originating from a videoconference site and received through a network interface, to network-connected terminals. In situations in which the videoconference includes the presentation of slides or other content, the device may include a file conversion engine for converting the presentation content received through a data interface into a standard graphic image format, for synchronous distribution with the audio and video content stream. The multimedia content may be viewed in a multiple-window interface, wherein the audio and video content is presented by a streaming media player, and the presentation content is displayed in a separate window. Additionally, the interface may include an interactive text entry interface, through which the viewer may submit comments or questions to the conference presenters. In an operating architecture that includes a separate remote streaming server and a separate network server, a method of distributing content to a large number of viewers includes continuously transmitting the current and successive presentation images to the network server for caching, whereby the viewer web browser can request and locally cache the images prior to arrival of the associated audio and video content.

Interactive conference content distribution device and methods of use thereof

A monolithic integrated circuit for providing enhanced audio performance in personal computers. The monolithic circuit includes a wavetable synthesizer; a full function stereo coding and decoding circuit including analog-to-digital and digital-to-analog conversion; data compression, and mixing and muxing of analog signals; a local memory control module for interfacing with external memory; a game-MIDI port module; a system bus interface; and a control module for compatibility and circuit control functions.

Monolithic PC audio circuit

This invention is for a single monolithic audio processing integrated circuit which includes a synthesizer module, a CODEC module and an external serial data port in the CODEC module for bi-directional serial data communication between the CODEC module and an external serial data device, such as a digital signal processor. A serial data path between the synthesizer module and the CODEC module is also included.

Audio processing chip with external serial port

A power control and memory refresh rate management circuit is described. The power control circuit provides circuitry for selectively disabling or enabling modular logic circuit blocks within a VLSI integrated circuit under program control from an external processor, or for suspended circuit operation in general. In low-power modes external memory refresh signal generation circuits are provided with a low-frequency oscillator signal to conserve power.

Power control of circuit modules within an integrated circuit

A digital wavetable audio synthesizer is described. The synthesizer can generate up to 32 high-quality audio digital signals or voices, including delay-based effects, at either a 44.1 KHz sample rate or at sample rates compatible with a prior art wavetable synthesizer. The synthesizer includes an address generator which has several modes of addressing wavetable data. The address generator's addressing rate controls the pitch of the synthesizer's output signal. The synthesizer performs a 10-bit interpolation, using the wavetable data addressed by the address generator, to interpolate additional data samples. When the address generator loops through a block of data, the signal path interpolates between the data at the end and start addresses of the block of data to prevent discontinuities in the generated signal. A synthesizer volume generator, which has several modes of controlling the volume, adds envelope, right offset, left offset, and effects volume to the data. The data can be placed in one of sixteen fixed stereo pan positions, or left and right offsets can be programmed to place the data anywhere in the stereo field. The left and right offset values can also be programmed to control the overall volume. Zipper noise is prevented by controlling the volume increment. A synthesizer LFO generator can add LFO variation to: (i) the wavetable data addressing rate, for creating a vibrato effect; and (ii) a voice's volume, for creating a tremolo effect. Generated data to be output from the synthesizer is stored in left and right accumulators. However, when creating delay-based effects, data is stored in one of several effects accumulators. This data is then written to a wavetable. The difference between the wavetable write and read addresses for this data provides a delay for echo and reverb effects. LFO variations added to the read address create chorus and flange effects. The volume of the delay-based effects data can be attenuated to provide volume decay for an echo effect. After the delay-based effects

Monolithic PC audio circuit with enhanced digital wavetable audio

Growing community of inventors

Austin, TX, United States of America

Michael Hogan