Seagate Technology Incorporated

Other

Jp Morgan Chase Bank

Michael H Miller

Judy Lynn Westby

Charles William Thiesfeld

Richard Esten Bohn

Jonathan Williams Haines

Martin Ragnar Furuhjelm

James Allen Coomes

Zine-Eddine Boutaghou

Mark A Gaertner

Zine Eddine Boutaghou

Sumanth Jannyavula Venkata

Jason Matthew Feist

Kenneth William Preslan

Steven R Soltis

Raymond Wesley Gilson

Edward Alan Soltis

Matthew O'Keefe

Gerald A Houlder

Thomas M Ruwart

A distributed data storage system can consist an attack module connected to distributed data storage system that has at least one host connected to a first data storage device and a second data storage device via a network controller. A susceptibility to a third-party attack in the distributed data storage system may be identified with the attack module, which prompts the generation of an attack counter strategy with the attack module. The attack counter strategy can have at least one proactive action directed at preventing a future third-party attack on the detected susceptibility that is executed prior to a third-party attack to temporarily randomize execution timing of a data access operation of the distributed data storage system.

Data storage device with security module

Apparatus and method for verifying firmware used by a programmable processor in a processor-based device, such as but not limited to a solid-state drive (SSD). In some embodiments, the firmware is stored in a device memory and is accessed to generate an output value using a suitable mathematical function, such as a cryptographic function, a cyclic redundancy check (CRC) function, etc. The output value is used to verify a state of the firmware, such as by ensuring a proper version of firmware has been loaded, that an attacking party has not tampered with the firmware, etc. The firmware may be subsequently loaded and executed by the programmable processor responsive to successful verification. A nonce value supplied by a host can be incorporated into the output value generation process.

Confirming a version of firmware loaded to a processor-based device

Apparatus and method for protecting firmware and other types of control data used in a processor-based device, such as but not limited to a solid-state drive (SSD). In some embodiments, the firmware is stored in a firmware store as a plurality of program instructions in a first sequence. The program instructions are loaded to a local memory in a different, second sequence. In some cases, a random number is generated and the second sequence is selected using the random number. A translation table may be generated and used by a programmable processor to locate the various program instructions in the second sequence. In other cases, instructions with calls and other references to other instruction lines are modified based on the order in the local memory. Other forms of control data may also be generated and stored to the local memory in a random order and interspersed with the firmware.

Randomizing firmware loaded to a processor memory

A data storage system and associated method of using may generally have at least a data storage device that has independent first and second interfaces respectively connecting the data storage device to a host controller and an auxiliary controller. The auxiliary controller can be configured to provide system information to the data storage device prior to a synchronized connection being established between the data storage device and the host controller.

Data storage system with pre-boot interface

A single device that provides computing system-level functionality with non-volatile storage controller functionality. These functionalities can share the same electronics.

Integrated circuit

A variety of data storage devices, methods and systems are implemented for control of memory associated with backup functionality. One such data storage device includes a power circuit that provides main power. The data storage device has a first solid-state memory circuit that maintains data in the absence of electrical power. A second memory circuit is subject to data loss in the absence of electrical power. A storage circuit stores energy and provides the stored energy to the second memory circuit in response to a loss of main power. A test circuit discharges a portion of the stored energy to provide output data indicative of power-providing capabilities of the storage circuit. A memory controller controls data transfers to the data storage device by temporarily storing data destined for the first solid-state memory circuit and setting the amount of memory available for temporary storage in response to the output data.

Systems, methods and devices for control of the operation of data storage devices using solid-state memory

Systems and methods are disclosed for distributed power delivery. In certain embodiments, an apparatus may comprise a device configured to control power to one or more power-consuming components via managing power usage among the one or more power-consuming components based on a priority of a task associated with the one or more power-consuming components. In certain embodiments, a device may comprise a processor configured to: receive a request to allow a component to expend an amount of power, determine if the request can be satisfied with an unallocated power budget managed by the processor, the unallocated power budget being an unallocated portion of a total power budget managed by the first processor, and allow the component to expend the amount of power when the request can be satisfied with the unallocated power budget.

Distributed power delivery

A device comprises a data storage media storing data content and a digital signature. At least a portion of the digital signature is encrypted on the data storage media. The device also includes a removable control circuitry including a unique key. If the unique key corresponds to the encrypted portion of the digital signature, the removable control circuitry allows access to the data content. If the unique key does not correspond to the encrypted portion of the digital signature, the removable control circuitry prevents access to the data content. Embodiments of the invention may be useful to prevent a user from accessing the data content without the original control circuitry used to write the data content. For example, embodiments of the invention may prevent a user from using a different control circuitry that would readily allow unauthorized copying and distribution of the data content.

Prevent data storage device circuitry swap

Displaying storage device status conditions using multi-color light emitting diodes (LEDs) involves monitoring values of a status condition of at least one persistent storage device. The values are mapped to two or more colors, and at least one multi-color LED displays the two or more colors in response to the respective values.

Displaying storage device status conditions using multi-color light emitting diode

A system for peer-to-peer vibration mitigation in a distributing computing system includes a secondary communication interface over which chassis management electronics (e.g., a chassis-level controller) and/or system storage nodes may initiate communications to in order to affect system changes that may decrease vibration-related performance degradation in the system.

Peer to peer vibration mitigation

Devices for control of the operation of data storage devices using solid-state memory based on a discharge of an amount of stored energy indicative of power providing capabilities

Systems, methods and devices for control of the operation of data storage devices using solid-state memory and monitoring energy used therein

Data storage systems are provided. Some embodiments of data storage systems include a storage device controller and a plurality of storage devices. The plurality of storage devices are illustratively in a redundancy scheme and the storage device controller receives from the plurality of storage devices a plurality of symbols. In one embodiment, each of the plurality of symbols is representative of data in the redundancy scheme, and the storage device controller verifies the consistency of the redundancy scheme based at least in part on the plurality of symbols.

Data storage system redundancy scheme verification

Systems and methods of storing error correction data are provided. A method may include storing data at a first memory having a first non-volatile memory type. The method may also include determining error correction data related to the stored data. The method may further include storing the error correction data at a second memory having a second non-volatile memory type. The first non-volatile memory may have a slower random access capability than the second non-volatile memory.

System and method of storing reliability data

Cyclic-redundancy-code ('CRC') information that is received along with a frame from a fiber-channel is stored in an on-chip frame buffer, and later checked to ensure the integrity of the data while in the frame buffer. In various embodiments, data frames, along with their CRC information, are stored into a data-frame buffer, and/or non-data frames along with their CRC information are stored into a receive-non-data-frame buffer. The improved communications channel system includes a channel node having dual ports, each port supporting a fiber-channel arbitrated-loop serial communications channel. The serial communications channels each include CRC on data transmissions on the channel, an on-chip frame memory located on-chip in the channel node that receives a data frame and the frame's associated CRC from the communications channel, and an integrity apparatus that later uses the received associated CRC for data-integrity checking of data in the on-chip frame memory. In addition, a method for using CRC for data integrity in on-chip memory is described.

Growing community of inventors

Eden Prairie, MN, United States of America

Michael H Miller