Globalfoundries Inc.

Michael Gester

Lars W Liebmann

Gustavo Enrique Tellez

Michael S Gray

Kevin W McCullen

Alexander Ivrii

Matthew Thomas Guzowski

Methods of the present disclosure can include: using a computing device to perform actions including: applying a design rule check (DRC) on a proposed integrated circuit (IC) layout, wherein the DRC applies a set of restrictive design rules (RDRs) in response to the proposed IC layout being a contact area (CA) layout; computing a conflict graph for the proposed IC layout in response to one of the IC layout being a metal layer layout and the set of RDRs being satisfied; determining whether the IC layout is one of non-colorable, indeterminate, partially colorable, and fully colorable; and partially coloring the IC layout and identifying non-colorable nodes in response to the IC layout being indeterminate or partially colorable.

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Bonn, Germany

Michael Gester