Quellan, Inc.

Texas Instruments Corporation

Intersil Americas Inc.

Michael Gerald Vrazel

Andrew Joo Kim

Charles E Summers

Vincent Mark Hietala

Stephen E Ralph

Joy Laskar

Abishek Manian

Edward Gebara

Sanjay Bajekal

Bruce C Schmukler

Sungyong Jung

Arvind Raghavan

Ziba Nami

Jyothi Emmanuel Peddi

Yonghui Tang

Eleazar Walter Kenyon

David Anthony Stelliga

Robin Gupta

Ashkan Roshan Zamir

Michael Francis Farrell

Mark W Dickmann

Joy Lasker

A receiver includes: equalizer circuitry; clock and data recovery (CDR) circuitry; sampler circuitry; adaptation circuitry; and clock adjustment circuitry. The receiver is configured to: receive data via a channel; perform equalization operations on received data, the equalization operations resulting in equalization results; perform sampling operations responsive to the equalization results, the sampling operations resulting in data samples and error samples; perform adaptation operations responsive to the data samples and the error samples, the adaptation operations resulting in a clock adjustment control signal; and adjust a sampling clock signal relative to a CDR clock signal responsive to the clock adjustment control signal.

Receiver with pre-cursor intersymbol interference mitigation

Signal conditioning circuitry includes logic circuitry, a low-pass filter, and comparator circuitry. The logic circuitry is configured to compare a data unit with a preceding data unit, from a sequence of data units, and provide a logic output signal. The low-pass filter is coupled to the logic circuitry, and the low-pass filter is configured to provide a data transition density measurement for the sequence of data units based on the logic output signal. The comparator circuitry is coupled to the low-pass filter, and the comparator circuitry is configured to compare the data transition density measurement to a threshold and, based on the comparison to the threshold, indicate a disruptive pattern in the sequence of data units.

Data transition tracking for received data

A circuit includes a phase and frequency detector circuit to generate a first phase detect signal indicative of whether a polarity of a first clock is the same as a polarity of a second clock upon occurrence of an edge of a data signal. The second clock being 90 degrees out of phase with respect to the first clock. A lock detect circuit determines, based on the first phase detect signal, that a third clock is one of frequency and phase locked to the data signal, frequency and quadrature locked to the data signal, and not frequency locked to the data signal.

Frequency/phase lock detector for clock and data recovery circuits

A data correction filter includes an equalizer circuit, first, second, and third asynchronous comparators, an error amplifier, a multiplexer, a delay circuit, first and second exclusive-OR gates, and first and second integrator circuits. The first asynchronous comparator is coupled to the equalizer circuit. The second and third asynchronous comparators are coupled to the equalizer circuit and the error amplifier. The multiplexer is coupled to the first, second, and third asynchronous comparators. The delay circuit is coupled to the first asynchronous comparator. The first exclusive-OR gate is coupled to the delay circuit and the multiplexer. The second exclusive-OR gate is coupled to the first asynchronous comparator and the multiplexer. The first integrator circuit is coupled to first exclusive-OR gate and the equalizer circuit. The second integrator circuit is coupled to the second exclusive-OR gate and the error amplifier.

Asynchronous data correction filter

A circuit can process a sample of a signal to emulate, simulate, or model an effect on the signal. Thus, an emulation circuit can produce a representation of a real-world signal transformation by processing the signal according to one or more signal processing parameters that are characteristic of the real-world signal transformation. The emulation circuit can apply analog signal processing and/or mixed signal processing to the signal. The signal processing can comprise feeding the signal through two signal paths, each having a different delay, and creating a weighted sum of the outputs of the two signal paths. The signal processing can also (or alternatively) comprise routing the signal through a network of delay elements, wherein a bank of switching or routing elements determines the route and thus the resulting delay.

Method and system for signal emulation

Signals propagating in one communication channel can generate crosstalk interference in another communication channel. A crosstalk cancellation device can process the signals causing the crosstalk interference and generate a crosstalk cancellation signal that can compensate for the crosstalk when applied to the channel receiving crosstalk interference. The crosstalk cancellation device can include a model of the crosstalk effect that generates a signal emulating the actual crosstalk both in form an in timing. The crosstalk cancellation device can include a controller that monitors crosstalk-compensated communication signals and adjusts the model to enhance crosstalk cancellation performance. The crosstalk cancellation device can have a mode of self configuration or calibration in which defined test signals can be transmitted on the crosstalk-generating channel and the crosstalk-receiving channel.

Method and system for crosstalk cancellation

Signals propagating on an aggressor communication channel can cause detrimental interference in a victim communication channel. A signal processing circuit can generate an interference cancellation signal that, when applied to the victim communication channel, cancels the detrimental interference. The signal processing circuit can dynamically adjust or update two or more aspects of the interference cancellation signal, such as an amplitude or gain parameter and a phase or delay parameter. Via the dynamic adjustments, the signal processing circuit can adapt to changing conditions, thereby maintaining an acceptable level of interference cancellation in a fluctuating operating environment. A control circuit that implements the parametric adjustments can have at least two modes of operation, one for adjusting the amplitude parameter and one for adjusting the phase parameter. The modes can be selectable or can be intermittently available, for example.

Method and system for automatic control in an interference cancellation device

Decreasing the average transmitted power in an optical fiber communication channel using multilevel amplitude modulation in conjunction with Pulse Position Modulation (PPM). This multilevel PPM method does not entail any tradeoff between decreased power per channel and channel bandwidth, enabling a lower average transmitted power compared to On/Off Keying (OOK) with no reduction in aggregate data rate. Therefore, multilevel PPM can be used in high-speed Dense Wavelength Division Multiplexed (DWDM) systems where the maximum number of channels is traditionally limited by nonlinear effects such as self-phase modulation (SPM), cross-phase modulation (XPM), four-wave mixing (FWM), stimulated Brillouin scattering (SBS), and stimulated Raman scattering (SRS). This modulation technique can enable an increased number of channels in DWDM systems, thereby increasing aggregate data rates within those systems.

Multilevel pulse position modulation for efficient fiber optic communication

Data throughput rates are increased in an optical fiber communication system without requiring replacement of the existing optical fiber in a link. Channel throughput is increased by upgrading the components and circuitry in the head and terminal of an optical fiber communication system link. Aggregate throughput in a fiber optic link is increased beyond the range of conventional Wavelength Division Multiplexed (WDM) upgrades, while precluding the necessity of replacing existing fiber plants. The increase in system throughput is achieved by using advanced modulation techniques to encode greater amounts of data into the transmitted spectrum of a channel, thereby increasing the spectral efficiency of each channel. This novel method of increasing transmission capacity by upgrading the head and terminal of the system to achieve greater spectral efficiency and hence throughput, alleviates the need to replace existing fiber plants. Spectrally efficient complex modulation techniques can be supported by interface circuits with an increased level of signal processing capability in order to both encode multiple bits into a transmitted symbol and decode the original data from the received symbols.

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Atlanta, GA, United States of America

Michael Gerald Vrazel