Nvidia Corporation

Michael Garland

David Patrick Luebke

Timo Oskari Aila

John R Nickolls

Brian Matthew Fahs

Peter C Mills

Lars Nyland

Jeremy Sugerman

Timothy Foley

William N Bell

Shubhabrata Sengupta

Christian Lauterbach

Samuli Matias Laine

Gregory Diamos

Jonathan Cohen

Animesh Garg

Mojtaba Mehrara

Saurav Muralidharan

Vinu Joseph

One embodiment of a method includes determining, by a Bayesian optimizer, a first sparsity ratio associated with a limit on an accuracy loss caused by compressing the machine learning model. The method further includes selecting, by the Bayesian optimizer, a second sparsity ratio that optimizes a predefined objective function for the machine learning model within a search space bounded by the first sparsity ratio. The method further includes generating a compressed version of the machine learning model having the second sparsity ratio.

Bayesian optimization of sparsity ratios in model compression

One embodiment of the present invention sets forth a technique for efficiently performing voting operations within a multi-threaded parallel-processing system. A group of related parallel program threads executes within a processor core together in parallel. A new instruction, called a 'vote' instruction, is introduced that enables a parallel program thread to post an individual vote within the context of the group of related threads and to receive the result of the vote. In this fashion, the vote instruction advantageously reduces overhead associated with inter-thread communication, thereby improving overall system performance.

Systems and methods for voting among parallel threads

A device compiler and linker is configured to group instructions into different strands for execution by different threads based on the dependence of those instructions on other, long-latency instructions. A thread may execute a strand that includes long-latency instructions, and then hardware resources previously allocated for the execution of that thread may be de-allocated from the thread and re-allocated to another thread. The other thread may then execute another strand while the long-latency instructions are in flight. With this approach, the other thread is not required to wait for the long-latency instructions to complete before acquiring hardware resources and initiating execution of the other strand, thereby eliminating at least a portion of the time that the other thread would otherwise spend waiting.

Technique for grouping instructions into independent strands

A system, method, and computer program product are provided for assigning elements of a matrix to processing threads. In use, a matrix is received to be processed by a parallel processing architecture. Such parallel processing architecture includes a plurality of processors each capable of processing a plurality of threads. Elements of the matrix are assigned to each of the threads for processing, utilizing an algorithm that increases a contiguousness of the elements being processed by each thread.

System, method, and computer program product for assigning elements of a matrix to processing threads with increased contiguousness

A system, method, and computer program product are provided for categorizing a plurality of vertices of a graph into independent sets. A random number is assigned to each vertex in the graph and the assigned number of each vertex is compared to the assigned numbers each of the neighbors of the vertex, where all vertices in the graph that have an assigned number greater than the assigned numbers of each of their neighbors are added to a first independent set, and all vertices in the graph that have an assigned number less than the assigned numbers of each of their neighbors are added to a second independent set separate from the first independent set.

System, method, and computer program product for performing graph coloring

A system, method, and computer program product are provided for grouping linearly ordered primitives. In operation, a plurality of primitives are linearly ordered. Additionally, the primitives are grouped. Furthermore, at least one intersection query is performed, utilizing the grouping.

System, method, and computer program product for grouping linearly ordered primitives

A system, method, and computer program product are provided for performing a scan operation on a sequence of single-bit values using a parallel processing architecture. In operation, a scan operation instruction is received. Additionally, in response to the scan operation instruction, a scan operation is performed on a sequence of single-bit values using a parallel processor architecture with a plurality of processing elements.

System, method, and computer program product for performing a scan operation on a sequence of single-bit values using a parallel processor architecture

A system, method, and computer program product are provided for converting a reduction algorithm to a segmented reduction algorithm. In operation, a reduction algorithm is identified. Additionally, the reduction algorithm is converted to a segmented reduction algorithm. Furthermore, the segmented reduction algorithm is performed to produce an output.

System, method, and computer program product for converting a reduction algorithm to a segmented reduction algorithm

A ray tracing system, method, and computer program product are provided for simultaneously traversing a hierarchy of rays and a hierarchy of objects. In operation, a hierarchy of rays and a hierarchy of objects are simultaneously traversed. Additionally, ray tracing is performed, based on the traversal.

Ray tracing system, method, and computer program product for simultaneously traversing a hierarchy of rays and a hierarchy of objects

A system, method, and computer program product are provided for organizing a plurality of rays. In operation, a plurality of rays is identified. Additionally, the rays are organized, utilizing a bounding volume.

System, method, and computer program product for organizing a plurality of rays utilizing a bounding volume

A system, method, and computer program product are provided for converting a scan algorithm to a segmented scan algorithm in an operator independent manner. In operation, a scan algorithm and a limit index data structure are identified. Utilizing the limit index data structure, the scan algorithm is converted to a segmented scan algorithm in an operator-independent manner. Additionally, the segmented scan algorithm is performed to produce an output.

System, method, and computer program product for converting a scan algorithm to a segmented scan algorithm in an operator-independent manner

A system, method, and computer program product are provided for generating a ray tracing data structure utilizing a parallel processor architecture. In operation, a global set of data is received. Additionally, a data structure is generated utilizing a parallel processor architecture including a plurality of processors. Such data structure is adapted for use in performing ray tracing utilizing the parallel processor architecture, and is generated by allocating the global set of data among the processors such that results of processing of at least one of the processors is processed by another one of the processors.

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Lake Elmo, MN, United States of America

Michael Garland