Micron Electronics, Inc.

Micron Technology Incorporated

Michael G Henderson

Carlton Gene Amdahl

Dennis Henry Smith

Don A Agneta

Stephen E J Papa

Don Schiro

Karl S Johnson

Ken Nguyen

Don Shiro

A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adaptor chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one the network interface modules is removed.

Method of providing an interface to a plurality of peripheral devices using bus adapter chips

A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adapter chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one of the network interface modules is removed.

A cooling system for cooling components of a computer is provided. The cooling system includes a DC fan which operates at a speed which is substantially proportional to the voltage that is applied to the fan. A zener diode voltage divider is connected in series between a voltage source and a first input of the fan. The second input of the fan is connected to a reference voltage source. A switch is also connected in series between the voltage source and the first voltage input of the fan so as to be connected in parallel with the zener diode voltage divider. When the switch is in a first position, the voltage produced by the voltage source is applied directly to the fan allowing the fan to operate at a first speed. When the switch is in a second position, the voltage from the voltage source is applied to the first input of the fan through the zener diode such that the first input of the fan receives a second voltage that is less than the first voltage thereby causing the fan to operate at a second speed. The zener diode voltage divider is substantially current independent such that the voltage drop across the zener diode is substantially independent of the current that is drawn by the fan.

Computer fan speed control system method

Methods of removing and replacing data processing circuitry are provided comprising removing a network interface module from the computer without powering down the computer and removing an interface card from the network interface module. The further acts of replacing the interface card into the network interface module and replacing the network interface module into the computer without powering down the network computer are also performed in accordance with this method.

Method for hot swapping of network components

Computer fan speed control system

A system for expanding the loading capacity of a PCI bus in an information processing system having a multiple bus architecture. In one embodiment, the system comprises a processor-to-PCI bridge connected to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. A plurality of add-in board connectors are coupled to each of the generated PCI buses. In another embodiment, the system comprises two or more processor-to-PCI bridges connected to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. The resulting system expands the loading capacity of a PCI bus while adding resistance to single point failures.

System for expanding PCI bus loading capacity

A method for expanding the loading capacity of a PCI bus in an information processing system having a multiple bus architecture. In one embodiment, the method comprises connecting a processor-to-PCI bridge to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. A plurality of add-in board connectors are coupled to each of the generated PCI buses. In another embodiment, the method comprises connecting two or more processor-to-PCI bridges to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. The resulting system expands the loading capacity of a PCI bus while adding fault-tolerance and resistance to single point failures.

Method of expanding bus loading capacity

A network server includes removable network interface modules mounted in a chassis. The network interface modules connect to a CPU through an interconnection assembly module. The network interface modules may comprise removable canisters containing a plurality of interface cards.

Fault tolerant computer system

Computer fan speed control device

A method of cooling computer components is provided. The method comprises positioning the fan adjacent computer components so that the fan is in a position to blow air over the computer components, connecting the fan to a first voltage source through a zener diode voltage divider, connecting the fan to a first voltage source through a switch, manipulating the switch into a first position wherein a first voltage is applied to the fan thereby inducing the fan to operate at a first speed and manipulating the switch into a second position wherein a second voltage is applied to the fan thereby inducing the fan to operate at a second speed which is less than the first speed.

Growing community of inventors

San Jose, CA, United States of America

Michael G Henderson