Texas Instruments Corporation

Power Trends, Inc.

Michael G Amaro

Thomas Matthew LaBella

Jeffrey Anthony Morroni

Joseph Maurice Khayat

Naweed Anjum

Glynn Russell Ashdown

Ramanathan Ramani

Pradeep S Shenoy

Claude Albert Fernandez

Joseph Gerard Renauer

Robert Allan Neidorff

Saurav Bandyopadhyay

Charles Allen DeVries

Sergio Carlo-Rodriquez

Sreenivasan Kalyani Koduri

Taylor R Efland

Steven Alfred Kummerl

Yiqi Tang

Makarand Ramkrishna Kulkarni

Liang Wan

Michael Thomas DiRenzo

Huy Le Nhat Nguyen

John Brett Barry

Yuwei Luo

David A Williams

John M Bonfitto

Michael J Kane

Charles Allen DeVries, Jr

Mark Daniel Fleszewski

A packaged electronic device includes a multilayer lead frame with first and second trace levels, a via level, an insulator, a conductive landing pad and a conductive crack arrest structure, the conductive landing pad has a straight profile that extends along a first direction along a side of the multilayer lead frame, the conductive crack arrest structure has a straight profile along the first direction and the conductive crack arrest structure is spaced from the conductive landing pad along an orthogonal second direction.

Electronic device with crack arrest structure

A semiconductor package includes a first layer including a semiconductor die embedded within a dielectric substrate, and a first set of metal pillars extending through the dielectric substrate, a second layer stacked on the first layer, the second layer including a metal trace patterned on the dielectric substrate of the first layer, a passive component including at least one capacitor or resistor electrically coupled to the metal trace, and a second set of metal pillars extending from the metal trace to an opposing side of the second layer, and a third layer stacked on the second layer, the third layer including at least one inductor electrically coupled to metal pillars of the second set of metal pillars.

Multi-layer semiconductor package with stacked passive components

A switch-mode power supply circuit includes a low-side switching transistor, a high-side switching transistor, a low-side current sensing circuit, and a gate driver circuit. The low-side current sensing circuit is coupled to the low-side switching transistor and is configured to sense a current flowing through the low-side switching transistor. The gate driver circuit is coupled to the low-side current sensing circuit and the high-side switching transistor. The gate driver circuit is configured to generate a signal having a first drive strength to switch the high-side switching transistor based on current flowing through the low-side switching transistor being less than a threshold current, and to generate a signal having a second drive strength to switch the high-side switching transistor based on current flowing through the low-side switching transistor being greater than the threshold current. The first drive strength is greater than the second drive strength.

Switch-mode power supply with load current based throttling

A lead for a surface mount package for a semiconductor device, and the surface mount package employing the same. In one example, the lead includes a central segment with a first side and a second side, a first extension from a portion of the first side, and a second extension from a portion of the second side. The lead also includes a recess extending through a portion of the central segment, the first extension and the second extension.

Recess lead for a surface mount package

A series capacitor buck converter includes a first half-bridge circuit including a first high side power switch (HSA) and first low side power switch (LSA) connected in series having a first switching node (SWA) therebetween which drives a first output inductor, a second half-bridge circuit including a second HS power switch (HSB) and second LS power switch (LSB) connected in series having a second switching node (SWB) therebetween which drives a second output inductor. A transfer capacitor (Ct) is connected in series with HSA and LSA and between the first and second half-bridge circuits. A first current source is coupled for precharging Ct with a charging current (I_in) and a second current source is coupled to Ct for providing an output current (I_out). A feedback network providing negative feedback forces I_out to match I_in.

Series capacitor buck converter having circuitry for precharging the series capacitor

Timing circuitry causes: a first closed signal on a first switch control output before a signal on a second switch control output changes from a second closed signal to a first open signal; the first switch control output to provide a second open signal after a first selected time after the second switch control output changes from the second closed signal to the first open signal; and a third switch control output to provide a third closed signal a second selected time after the first switch control output changes from the first closed signal to a third open signal. A beginning of the first closed signal to a beginning of the first open signal is based on a later of: a current through a switch connected to the second switch control output exceeding a threshold current; and a clocked time after the beginning of the first closed signal.

Methods and apparatus for adaptive timing for zero voltage transition power converters

A circuit includes a first transistor and a second transistor coupled to the first transistor at a switch node and to a ground node. An estimator circuit receives a first signal to control an on and off state of the first transistor. The estimator circuit generates a second signal to control the on and off state of the second transistor. The second signal has a pulse width based on a pulse width of the first signal. A clocked comparator includes a clock input, a first input, and a second input. The first input receives a voltage indicative of a voltage of the switch node. The second input is coupled to a ground node. The clock input receives a third signal indicative of the second signal. The clocked comparator generates a comparator output signal. The estimator circuit adjusts the pulse width of the second signal based on the comparator output signal.

Adaptive synchronous rectification in a voltage converter

Described examples include a method of controlling a power converter including executing a plurality of cycles. Each cycle includes turning on a first switch during a first period, the first switch coupled between a power supply and an output inductance; turning on a second switch during a second period, the second switch coupled between an output inductance and ground; turning on a third switch at a first time during the second period, the third switch coupled between the power supply and an auxiliary inductance; and turning on a fourth switch on at a third time after the second time, the fourth switch coupled the auxiliary inductance and ground. The second period ends at a third time period after the first time based on a later of an overlap time and a current through a switch connected to the second switch current handling terminal exceeding a threshold current.

In a method arrangement, providing a zero voltage transition circuit including an input node, an output node, a switch node, an output inductor coupling the switch node and output node, an output capacitor coupling the output node and ground, a first switch coupling the input node and switch node, a second switch coupling switch node and ground, a first auxiliary switch coupling the input node to an auxiliary node, a second auxiliary switch coupling the auxiliary node to ground, and an auxiliary inductor coupling the auxiliary node to the switch node; closing the first auxiliary switch to couple the input to the auxiliary node; subsequently, when a current is below a cutoff threshold, opening the second switch; after a first delay period, opening the first auxiliary switch and closing the second auxiliary switch; and after a second delay period, closing the first switch. Apparatus and additional method arrangements are disclosed.

Methods and apparatus for resonant energy minimization in zero voltage transition power converters

A power converter includes at least a first phase including a high-side MOSFET transistor (HSA) and a low-side (LS) MOSFET transistor (LSA) driving a first output inductor. The first phase further includes an active gate drive assist circuit including first MOSFET switch (first switch) and second MOSFET switch (second switch) positioned in series between a source of HSA and a drain of LSA. A capacitor (CS) is between the source of HSA and drain of LSA. A bootstrap capacitor (CA) having a reference terminal is connected to a node between the first switch and the second switch.

Switched reference MOSFET drive assist circuit

A power circuit combination includes a series capacitor buck converter including a first half-bridge including a first high side power switch (HSA), first low side power switch (LSA) and a second half-bridge. A transfer capacitor (Ct) is connected in series with HSA and LSA, and between the first and second half-bridges. An adaptive HS driver circuit has an output coupled to a gate of HSA and includes a power supply circuit including a summing circuitry that dynamically outputs a variable power supply level (V) based on a fixed voltage and a voltage across Ct, a buffer driver, and a boost capacitor (C) across the buffer driver. Vis coupled to a positive terminal of C. The power supply circuit is configured so that as a voltage across Ct varies, Vadjusts so that a voltage across Cis changed less than a change in voltage across Ct.

Adaptive boost driver charging circuit

A pallet () supporting a half-etched leadframe with cantilever-type leads () without metallic supports during the step of attaching components () to the leads in order to assemble an electronic system. After assembly, the pallet is removed before the molding step that encapsulates () the components on the leadframe and mechanically supports () the cantilever leads. The pallet is machined from metal or inert plastic material, tolerates elevated temperatures during soldering, and is reusable for the next assembly batch.

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Naperville, IL, United States of America

Michael G Amaro