Raytheon Company

Michael G Adlerstein

Francois Y Colomb

Mark P Zaitlin

Thomas E Kazior

Jerome Howard Pozgay

Valery S Kaper

Kiuchul Hwang

Steven Marc Lardizabal

Jeffrey H Saunders

Katherine J Herrick

Kamal Tabatabaie-Alavi

James W McClymonds

John C Tremblay

Christopher P McCarroll

Robert L Sprague

A flat panel active electronically scanned array (AESA) () includes heterogeneous integrated circuit DC-DC voltage converters () periodically placed on array elements (). A heterogeneous integrated circuit () includes a voltage converter () configured to receive an input voltage (V), and to convert the input voltage to an output voltage (V) that is different from the input voltage, the voltage converter () comprising an analog and/or digital PWM circuit (). The heterogeneous integrated circuit () also includes a feedback circuit () configured to receive the output voltage (V), and to generate a control signal used to vary a pulse width of a PWM signal generated by the analog and/or digital PWM circuit (). The digital PWM circuit () is implemented in a heterogeneous integrated circuit () fabricated on a common substrate () using CMOS and GaN fabrication processes.

Distributed power conditioning with DC-DC converters implemented in heterogeneous integrated circuit

An antenna element includes a bias network circuitry for: during a receive mode, charging a transmit supply capacitor from a transmit power source while decoupling a receive supply capacitor from a receiver power source and coupling the receive supply capacitor to discharge and thereby provide bias to the receiver; and during a transmit mode, charging the receive supply capacitor from the receive power source while decoupling the transmit supply capacitor from the transmit power source and coupling the transmit supply capacitor to discharge and thereby provide bias the transmitter. The antenna element includes a phase shifter/attenuator section having an amplifier and a phase shifter and wherein bias voltage is provided to the amplifier and phase shifter by the transmit supply capacitor during the transmit mode and the receive supply capacitor during the receive mode.

Low noise bias circuit for phased array antenna element

A feed structure for a radio frequency antenna, comprising: a plurality of radio frequency antenna elements; and a plurality of detectors, each one of the detectors being coupled to a corresponding one of the radio frequency antenna elements. Each one of the detectors is responsive to optical frequency energy to produce input radio frequency power for the corresponding one of the antenna elements coupled to said one of the detectors.

Embedded optical waveguide feed structure for radio frequency antenna arrays

A digital to analog converter having a plurality of power dividers interconnected into a binary tree configuration, each one having an input and a pair of electrically isolated outputs for dividing power of an input signal at the input equally between the pair of outputs. A plurality of amplifiers is coupled between one of the pair of outputs of the one of the power dividers in one stage of the tree and the input of one of the power dividers in a succeeding stage of the tree. A power combiner is coupled between outputs of the amplifiers in a last one of the stages and an output of the analog to digital converter.

Power digital to analog converter

A method for packaging a semiconductor device. The method includes: providing a dielectric layer over the semiconductor device; determining patterns and placement of material on the dielectric layer to provide a predetermined magnetic or electric effect for the device, such effects being provided on the device from such patterned and placed material solely by electrical or magnetic waves coupled between such material and the device; and forming the material in the determined patterns and placement to provide the predetermined effects.

Microwave integrated circuit package and method for forming such package

A system for detecting the amplitude of radio frequency energy includes: an antenna for receiving the radio frequency energy; a modulator, responsive to a reference frequency signal, for pulse modulating the received radio frequency energy at the reference frequency; a detector for converting such pulse modulated signal to a detector output signal having a low frequency component representative of the amplitude of the received radio frequency energy, in summation with DC bias current, and a high frequency component at the reference signal; and a high pass or band pass filter fed for the detector output signal for passing the high frequency components and for removing the low frequency component. A phase detector, with or without a subsequent IF amplifier, is fed by the reference frequency and the high frequency components for producing an output representative of the high frequency components. A low noise amplifier is fed by the antenna and has a bias fed by the reference frequency signal for modulating the received radio frequency energy at the reference frequency.

Sub-millimeter wave imaging system

A circuit having a frequency controllable oscillator and a variable time delay circuit. The time delay circuit is fed by a signal produced by the oscillator, such time delay circuit being coupled to the oscillator to control the frequency of the signal produced by the oscillator. The circuit allows frequency agility of a phase locked loop although locked to a common reference frequency.

Frequency agile phase locked loop

A semiconductor structure having: a III-V substrate structure; an enhancement mode transistor device disposed in a first region of the structure; a depletion mode transistor device disposed in a laterally displaced second region of the structure; and a RF/microwave/milli-meter wave transistor device formed in a laterally displaced third region thereof.

Monolithic integrated circuit having enhancement mode/depletion mode field effect transistors and RF/RF/microwave/milli-meter wave milli-meter wave field effect transistors

A method includes providing a single crystal wafer having MMIC chips. Each chip has an active device in a first surface portion of a semiconductor substrate provided by the wafer and an electrical interconnect having a first portion disposed on a second surface of the semiconductor substrate. The semiconductor substrate structure has a via therethrough, a second portion of the electrical interconnect passing though the via and being electrically connected to the active device. A multilayer interconnect structure is formed on the wafer providing a signal routing section on the second surface portion of a corresponding one of the chips. Each section has dielectric layers and an electrical conductor, such electrical conductor being electrically coupled to the active device to route an electrical signal to such active device. Each chip and the corresponding signal routing section are separated from the wafer.

MMIC having back-side multi-layer signal routing

A phase shifter is fed an input signal having a frequency f. A coupler is included fed by the input signal. The coupler has a pair of output terminals for providing a pair of signals having the frequency f and having a relative phase shift difference of m&#x3c0;/2 radians, where m is an integer. A switch is included having a pair of inputs, each one of the pair of inputs being coupled to a corresponding one of the pair of output terminals of the coupler. The switch has an output, one of the pair of inputs of the switch being coupled to the output of the switch selectively in accordance with a first control signal fed to the switch. An oscillator is included having a tunable resonant circuit coupled to the output of the switch, such tunable resonant circuit has a nominal resonant frequency which is an integer multiple of the frequency f, the frequency of the resonant circuit being detuned from the nominal resonant frequency in response to a second control signal fed to the tunable resonant circuit to shift the nominal resonant frequency relative to the a harmonic of the signal at the output of the switch.

Phased array radar systems and subassemblies thereof

A microwave integrated circuit chip having microwave transmission line coupled to an input of a microwave circuitry: The microwave transmission line comprises: a substrate; a strip conductor disposed on a first surface of the substrate, such strip conductor having an input signal pad at one end thereof, and a ground plane disposed on a second, opposite surface of the substrate. The microwave circuitry has capacitive input impedance. The chip includes a via passing from the first surface of the substrate, through the substrate, to the ground plane. A test probe ground pad is disposed on the first surface of the substrate and spaced from a portion of the via disposed on the first surface of the substrate. An electrical conductor is disposed on the first surface of the substrate extending from the portion of the via disposed on the first surface of the substrate via to the test probe ground pad, such electrical conductor providing an inductive impedance selected to provide a resonance with the capacitive input impedance of the microwave circuitry.

Tuned MMIC probe pads

A circuit for sensing radio frequency energy. The circuit includes a Wheatstone bridge having at least one element thereof thermally responsive to the radio frequency energy passing therethough differently from radio frequency energy passing though at least one other element of the bridge.

Broadband microwave power sensor

A circuit for determining temperature of an active semiconductor device disposed on a semiconductor substrate and a Wheatstone bridge circuit. The bridge has in each of four branches thereof a thermal sensitive device, one pair of such thermal sensitive devices being in thermal contact with an electrode of the active device. Another pair of such thermal sensitive devices is in thermal contact with the substrate. The thermal sensitive devices are resistors. The active device is a transistor. A tuning circuit is coupled to an output of the transistor, such tuning circuit having a tunable element controlled by a control signal fed to such tunable element. A processor is responsive to a voltage produced at an output of the Wheatstone bridge circuit and a signal representative of power fed to the transistor. The output provided by the Wheatstone bridge provides a measure of a temperature difference between the temperature of the transistor and ambient temperature.

Integrated thermal sensor for microwave transistors

An amplifier is provided having an electrically conductive structure. The structure has a waveguide network disposed in an inner region thereof. The network has an input section and an output section. The conductive structure has an amplifier input port and amplifier output port formed in outer wall portions of such structure. The network also includes a plurality of amplifier module input ports disposed in an outer surface of the structure. The amplifier input ports are coupled to the amplifier port through the input section of the network. The network further includes a plurality of amplifier module output ports disposed in said outer surface of the structure. The amplifier module output ports are coupled to the amplifier output port through the output section of the network. Each one of the amplifier module output ports is associated with one of the plurality of amplifier module input ports. The amplifier includes a plurality of amplifier modules. Each one of the amplifier modules has an input and an output. The input each amplifier module is coupled to a corresponding one of the amplifier input ports and the output of such module is coupled to the amplifier output port of the one of the amplifier output ports associated with such one of the amplifier input ports.

Growing community of inventors

Wellesley, MA, United States of America

Michael G Adlerstein