Intel Corporation

Infineon Technologies Ag

Intel Mobile Communications Gmbh

Intel Deutschland Gmbh

Michael Fulde

Franz Kuttner

Harald Gossner

Christian Cornelius Russ

Stephan Leuschner

Gerhard Knoblinger

Antonio Passamani

Daniel Sira

A method for operating a radio frequency digital to analog conversion circuitry with a number of cells if a first input sample and a subsequent second input sample have different signs, comprises generating a first analog signal corresponding to the first input sample using a first subset of the number of cells of the digital to analog conversion circuitry with a local oscillator signal having a first polarity. The method further comprises applying a second local oscillator signal with an inverted polarity to a second subset of cells of the digital to analog conversion circuitry when a number of cells from the first subset of cells are used and selecting a number of cells from the second subset of cells to generate a second analog signal corresponding to the second input sample.

Method for operating radio frequency digital to analog conversion circuitry in the event of a first and a subsequent second input sample with different signs and an digital to analog conversion circuitry

A digital-to-analog converter circuit including a plurality of digital-to-analog converter cells is provided. A first digital-to-analog converter cell of the plurality of digital-to-analog converter cells includes a cell control module configured to provide alternatingly a first voltage and a second voltage to a first electrode of a capacitive element of the first digital-to-analog converter cell based on a digital input signal during a predefined time interval. A second digital-to-analog converter cell of the plurality of digital-to-analog converter cells includes a cell control module configured to provide a third voltage to a first electrode of a capacitive element of the second digital-to-analog converter cell during the predefined time interval. The first voltage is higher than an upper threshold voltage corresponding to a first digital threshold level of the digital input signal and the second voltage is lower than a lower threshold voltage corresponding to a second digital threshold level of the digital input signal. The third voltage is constantly between the upper threshold voltage and the lower threshold voltage.

Digital-to-analog converter circuit, an apparatus for providing a radio frequency transmit signal and a method of digital-to-analog conversion

One example described herein relates to a digital to analog converter (DAC). The DAC includes a digital signal input configured to receive a multi-bit digital input signal, and a plurality of unit cells arranged in rows and columns. A row decoder and a column decoder provide respective control signals to respective rows and respective columns to selectively couple a number of the unit cells to an output of the DAC. The number of unit cells which are coupled to the output by the control signals is dependent on the multi-bit digital input signal. At least one of the control signals is modulated based on a local oscillator signal.

Digital to analog converter comprising mixer

A communication system receives an inputs signal and generates a converted output signal. A control signal selectively activates one or more source cells among an array of cells. The selected source cells generate a first charge package and a second charge package at a cell output terminal for the array of cells to generate the converted output signal. The first charge package and the second charge package are generated during the same clock cycle.

Digital to analog converter cell for signed operation

Some examples relate to a digital to analog converter (DAC). The DAC includes a digital signal input configured to receive a multi-bit digital input signal, and an array of cells. Respective cells in the array comprise respective capacitors. The DAC also includes a control circuit configured to, based on the multi-bit digital input signal, selectively induce one or more corresponding capacitors to discharge current to an output terminal of the DAC.

Capacitive digital to analog converter

One example described herein relates to a digital to analog converter (DAC). The DAC includes a digital signal input configured to receive a multi-bit digital input signal, and a plurality of cells arranged in rows and columns. Each cell includes a current source. A row decoder and a column decoder provide respective control signals to respective rows and respective columns to selectively couple a number of the current sources to an output of the DAC. The number of current sources which are coupled to the output by the control signals is dependent on the multi-bit digital input signal. At least one of the control signals is modulated based on a local oscillator signal.

A circuit is provided with a plurality current cells. The current cells each comprise a main current source and an auxiliary current source coupled in parallel. The main current source supplies a main current to a current output of the current cell, and the auxiliary current source supplies an auxiliary current to the current output of the current cell. The main current sources are weighted according to a first predefined waveform, and the auxiliary current sources are weighted according to a second predefined waveform which is different from the first predefined waveform.

Digital waveform synthesis

According to one embodiment of the present invention, an ESD protection element for use in an electrical circuit is provided, including a plurality of diodes which are connected in series with one another and which are formed in a contiguous active area, wherein the ESD protection element has a fin structure.

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Drobollach, Austria

Michael Fulde