Bell Telephone Laboratories

At&t Bell Laboratories

US Government As Represented by the Secretary of the Army

Michael F Tompsett

George Elwood Smith

Raphael Tsu

Carlo Heinrich Sequin

Edward J Zimany, Jr

Ronald E Crochiere

Donald L Fraser, Jr

A light emitting diode comprising microporous silicon of one conductivity type forming a PN junction with silicon of the opposite conductivity type and electrodes respectively connected to said regions, at least one of the electrodes being transparent.

Light emitting diode with electro-chemically etched porous silicon

An automatic gain control (AGC) amplifier circuit uses a control loop comprising a digital counter (70) which controls a multiplying digital-to-analog converter (10) arranged as an attenuator of the input v to the AGC. The counter (70) is arranged to count up or down depending upon the output signal of the AGC circuit. In addition, a latency can be introduced into the control loop so that in case of most signal envelope variations, the counter is frozen to prevent output fluctuations.

Automatic gain control amplifier circuit

In a semiconductor integrated circuit comprising an amplifier for detecting the presence of a carrier on an incoming wave signal, in order to suppress dc offset in the incoming wave and at the same time minimize any inherent input amplifier offset, the amplifier is supplied with a switched capacitor input network connected between a first input terminal of the amplifier and a circuit input terminal for receiving an incoming signal, and with a switched capacitor feedback network connected between an output terminal of the amplifier and a second (opposite polarity) input terminal of the amplifier.

Amplifier circuit arrangement for eliminating input signal offset in the

Charge transfer devices are adapted to provide all possible forms of combinational logic functions by using combinations and variations of a basic state inversion-bit regeneration element. This basic element employs electrically floating means in the vicinity of a charge transfer device to sense the presence or absence of charge therein and to control the transfer of a newly-generated amount of charge away from an independent source.

Charge transfer logic apparatus

A number of known circuit configurations require high-ratio-accuracy capacitors. Maintaining such ratios during the various processing steps involved in fabricating the configurations in integrated-circuit form has been found to be difficult. In accordance with this invention, ratio capacitors are made in integrated-circuit form utilizing a unique geometry. In one specific embodiment, a so-called H-section geometry that is largely insensitive to processing variations is utilized to form the capacitors. In this way, high-yield low-parasitic precisely matched pairs of ratio capacitors are achieved.

High-ratio-accuracy capacitor geometries for integrated circuits

A charge transfer device includes two channels and a common input structure. The input structure is operated in a manner to divide a charge packet of signal-independent size into two complementary packets for movement along the two channels. A single-channel embodiment employs a similar input structure.

Linear differential charge splitting input for charge coupled devices

The optical intensity pattern of a two-dimensional image field is electrically scanned a line at a time by a shift register access technique, thus providing a first stream of bits for each line. Each of these bits in a given line is compared with a dither coded second stream of bits generated in response to the background illumination (absence of image) along a line immediately adjacent to the line being scanned. The resulting sequence of comparisons is a dither coded signal representation of the line being scanned, which is compensated for nonuniform background illumination of the image field.

Optical image sensor semiconductor apparatus

A semiconductor charge coupled device (CCD) is provided with an array of auxiliary charge storage sites of successively decreasing binary digital storage capacities (1/2, 1/4, 1/8, 1/16, etc.) along the CCD propagation direction. These auxiliary sites sequentially subtract, from a propagating analog signal charge packet, successive amounts of charge ('1') vs. no charge ('0') corresponding to the presence vs. absence of correspondingly sufficient charge in the propagating analog packet. The resulting sequence of '1''s and '0''s provides a digital representation in the binary system of the analog signal charge packet.

Semiconductor charge coupled device analog to digital converter

A semiconductor charge coupled device (CCD) with split electrode charge sensors contains a localized connecting impurity doped region, of opposite conductivity type from that of the semiconductor transfer sites, underlying the gap between each pair of split electrodes; and each such connecting region is contiguous with both transfer sites underlying each pair of split electrodes, thereby serving to equilibrate the potentials of both such transfer sites. The entire downstream edge of each of these connecting regions is bounded by a separate localized channel stopping auxiliary barrier region of higher threshold than that of the charge transfer channel, in order to suppress dynamic signal charge transfer inefficiency caused by spurious contributions of charge from the connecting regions to the propagating signal charge packets.

Semiconductor charge coupled device with split electrode configuration

Line imaging and area imaging devices are described which employ the concept of storage and transfer of charge carriers in a semiconductor medium by the application of appropriate potentials to electrodes disposed above the medium. The devices are characterized by two arrays of electrodes, one functioning as an optical sensing array and the other as a storage and readout array. Charge carriers are collected in the medium under the metal electrodes of the sensing array in proportion to incident light. This information is rapidly transferred to the storage and readout array by sequentially biasing series of electrodes of the two arrays. The information may then be read out of the array without smearing while the sensing array continues to integrate. The structure includes means for preventing cross-coupling and maintaining transfer efficiency for small area electrodes.

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Summit, NJ, United States of America

Michael F Tompsett