Honeywell International Inc.

Flipchip International LLC

Flip Chip Technologies, L.l.c.

Michael E Johnson

Rida M Hamza

Peter Elenius

Au W Kwong

Thomas A Henderson

Chung-Jen Chen

Anthony Paul Curtis

Guy F Burgess

Deok Hoon Kim

John J H Reche

Stuart Lichtenthal

A method and device for enhanced reliability for semiconductor devices using dielectric encasement is disclosed. The method and device are directed to improving the reliability of the solder joint that connects the integrated circuit (IC) chip to the substrate. The method comprises applying a layer of a photoimageable permanent dielectric material to a top surface of the semiconductor device, and patterning the layer of the photoimageable permanent dielectric material to have an opening over each feature. The method further comprises dispensing or stencil printing fluxing material into the permanent dielectric material openings, and applying solder, which contains no flux, to a top surface of the fluxing material. In one or more embodiments, the method further comprises heating the semiconductor device to a reflow temperature appropriate for the reflow of the solder, thereby causing the solder to conform to sidewalls of the permanent dielectric material openings to form a protective seal.

Enhanced reliability for semiconductor devices using dielectric encasement

Methods, functional data, and systems are provided for image feature translation. An image is decomposed into sub images, each sub image having its features identified by feature attributes. The feature attributes are used to identify a particular feature within each sub image. The orientation of the particular feature within the sub image is then mapped or calculated to a value. One or more of the mapped or calculated values are translated into a reading associated with an instrument. The reading is then optionally recorded or transmitted.

Methods, functional data, and systems for image feature translation

Methods, functional Data, and Systems for image feature translation

A wafer-level CSP () includes at least one die () from a wafer. The wafer-level CSP has a plurality of solder ball pads (), a solder ball () at each solder ball pad and a polymer collar () around each solder ball. A moat () is formed in the surface of a polymer layer () disposed on the wafer during manufacturing of the wafer-level CSP. A temporarily liquified residual () from the polymer collar, which occurs while the wafer is heated to the reflow temperature of the solder ball, flows from the polymer collar. The moat acts as a barrier to material flow, limiting the distance that the residual spreads while liquified. The residual from the polymer collar remains within a region () defined by the moat. A full-depth moat () extends completely through the polymer layer. Alternatively, a partial-depth moat (and) extends partially through the polymer layer. The abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims pursuant to 37 C.F.R. &#xa7;1.72(b).

Wafer-level moat structures

A photomask () for producing partial-depth features (and) in a photo-imageable polymer layer () on a wafer of a chip scale package () using exposure tools capable of resolving sizes of a critical dimension or larger, has a plurality of chrome lines (). Each chrome line has a width () that is less than the critical dimension, and each chrome line of the plurality of chrome lines is spaced apart less than the critical dimension. The plurality of chrome lines produces a single partial-depth feature, such as a via, through part of a thickness of the polymer layer. Alternatively, the photomask has a plurality of chrome circles (), each chrome circle having a diameter less than the critical dimension and being spaced apart less than the critical dimension, which produces the partial-depth feature. The photomask may also have chrome of width greater than the critical dimension and spaced from other chrome by a distance greater than the critical dimension, which produces a full-depth feature through the entire thickness of the polymer film. The partial-depth feature and the full-depth feature are produced substantially simultaneously during a single series of photo-imaging steps. By preselecting a size, shape and distance between the chrome, the photomask is capable of inscribing discernable markings on the polymer layer, of changing the thickness of the polymer layer, and of changing an optical property of the surface of the polymer layer.

Forming partial-depth features in polymer film

Producing seamless tiled images from multiple displays includes measuring a luminance profile of each of the displays, computing a desired luminance profile for each of the displays, and determining a spatial gradient profile of each of the displays based on the measured luminance profile and the computed desired luminance profile. The determined spatial gradient profile is applied to a spatial filter to be inserted into each of the displays to produce the seamless tiled display image.

Method and apparatus for an optical function generator for seamless tiled displays

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Phoenix, AZ, United States of America

Michael E Johnson