Thomson Licensing

Deutsche Thomson-brandt Gmbh

Michael Drexler

Thomas Brune

Dieter Haupt

Oliver Kamphenkel

Marco Winter

Florian Keiler

Carsten Herpel

Axel Kochale

Heinz-Werner Keesen

Klaus Gaedke

Michael Arnold

Stefan Abeling

Jens Peter Wittenburg

Ralf-Detlef Schaefer

A smartphone having two microphones is used for determining the direction of a loudspeaker in a surround system setup. This is performed using smartphone rotation in azimuth and polar angle direction while capturing in its microphones a test signal from a current one of the loudspeakers. From the microphone signals a corresponding TDOA value is calculated, and the smartphone is rotated until that TDOA value is nearly zero, resulting in a loudspeaker direction information.

Method for using a mobile device equipped with at least two microphones for determining the direction of loudspeakers in a setup of a surround sound system

The invention concerns a solid state memory, comprising multiple logical units. The solid state memory contains an internal buffer for temporarily storing the incoming data steam before the incoming data are programmed to at least one page. The internal buffer keeps data that are not yet programmed in case a switch from one logical unit to another is performed. A method for operating such a device is presented.

Solid state memory with reduced number of partially filled pages

High speed mass storage devices using NAND flash memories (MDY.X) are suitable for recording and playing back a video data stream under real-time conditions, wherein the data are handled page-wise in the flash memories and are written in parallel to multiple memory buses (MBy). However, for operating with multiple independent data streams a significant buffer size is required. According to the invention, data from different data streams are collected in corresponding different buffers (FIFO, . . . , FIFO Z) until the amount of collected data in a current buffer corresponds to a current one of the data blocks. Then, the data of the current data block from the current buffer are stored into memories connected to a current one of the memory buses, wherein the following buffered data block of the related data stream is later on stored into memories connected to a following one of the memory buses, the number of the following memory bus being increased with respect to the number of the current memory bus. These steps are repeated, also for the other ones of the data streams using other available ones of the buffers and other ones of the memory buses. In combination with a corresponding buffer control it is possible to allocate and use a minimum number of buffers in a flexible way.

Storing/reading several data streams into/from an array of memories

The invention is related to a method and a device for recording of frames. Said method comprises buffering fractions of frames in a buffer and transferring from the buffer to memory devices data packets comprising at least one fraction, each, wherein after transferring to a first memory device a first fraction of a first frame, only fractions of said first frame are transferred to said first memory device until the amount of data belonging to said first frame and being transferred to said first memory device corresponds the storage capacity of at least one memory block comprised in said first memory device.

Method and device for recording of frames

For writing, flash memory devices are physically accessed in a page-oriented mode, but such devices are not error-free in operation. According to the invention, when writing information data in a bus write cycle in a sequential manner into flash memory devices assigned to a common data bus, at least one of said flash memory devices is not fed for storage with a current section of said information data. In case an error is occurring while writing a current information data section into a page of a current one of said flash memory devices, said current information data section is written into a non-flash memory. During the following bus write cycle, while the flash memory device containing that defective page is normally idle, that idle time period is used for copying the corresponding stored section of said information data from said non-flash memory to a non-defect page of that flash memory device.

Method and apparatus for dealing with write errors when writing information data into memory devices

Device for real-time streaming to an array of solid state memory device sets, said device comprising receiving means for receiving data from data streams of individual data rate in parallel, an input cache for buffering received data, a bus system for transferring data from the input buffer to the solid state memory device sets, and a controller adapted for using a page-receiving-time t_r, a page-writing-time wrt_tm, the data amount p and the individual data rates for dynamically controlling the bus system such that data received from the first data stream is transferred to solid state memory device sets comprised in a first subset of said array of solid state memory device sets, only, and data received from the at least a second data stream is transferred to solid state memory device sets comprised in a different second subset of said array of solid state memory device sets, only.

Device for real-time streaming of two or more streams in parallel to a solid state memory device array

Method and apparatus for dealing with write errors when writing information data into flash memory devices

Various applications record or handle uncompressed video, where the amount of information needed for each frame or field is constant, based on the video frame rate and color resolution of each pixel. Since various video frame rates and audio sample rates are defined and can be combined independently, the amount of audio samples per video frame may vary. The disclosed method allows packing audio samples and video samples into constant size containers, e.g. MXF containers, so that there is an integer amount of audio samples within the time period needed for one video frame, independent from the used video raster. The method includes generating constant length KLV encoded video packets, generating variable length KLV encoded audio packets corresponding to the same time period as the video packets, generating variable length KLV encoded data packets, wherein the sum of the lengths of the audio packet and the data packet are constant, and generating from said packets a constant size content package.

Method and device for recording digital data

When recording uncompressed video and/or audio data using a digital video recorder, there is the need for a robust memory arrangement based on non-volatile, integrated circuits which is able to be fitted directly on the video camera without a long external cable connection and which is also able to be used for shots under difficult conditions, particularly action shots. The inventive memory arrangement involves the use of a number of non-volatile memory chips which are connected together with a favorable level of circuit complexity. To be able to cope with the high data rate for the incoming video and/or audio data, a plurality of parallel supply buses are provided. Each supply bus has an associated number of memory chips. In this case, the memory word length of the memory chips is greater than the bus width of a data/address bus. A supply bus with high-quality multiplexing has a respective associated number of demultiplexer/driver circuits which match the bus width of the supply bus to the memory word length of the memory chips. There are respectively as many downstream memory chips per demultiplexer/driver circuit as prescribed by a value X, the value X being limited by the memory technology used, namely by the maximum number of circuits which can be connected, also called the 'fan-out' value. The memory chips used are preferably NAND Flash EPROM memory chips.

Memory arrangement, particularly for the non-volatile storage of uncompressed video and/or audio data

An electronic circuit includes a first and a second PLL stage (PLL, PLL) that can be switched in parallel or in series depending on locking of the first one of the PLL circuits to an input signal (IN). When in parallel, only the second PLL circuit (PLL) is actively supplying a clock signal to the output of the electronic circuit. The first PLL circuit (PLL) continues trying to lock onto the input signal (IN). A lock detector (LD) monitors the locking status of the first PLL circuit (PLL) to the input signal (IN) and, upon locking, sets switches (S, S) to couple the output of the first PLL circuit (PLL) to the input of the second PLL circuit (PLL), and to couple the output of the second PLL circuit (PLL) to the input of the first PLL circuit (PLL).

Switchable PLL circuit

An input filter stage and to a method for filtering a data stream. The input filter stage comprises a register chain, which is connected to an input line and has a plurality of series-connected registers, and a switching device connected to an output line and to the register chain in order to switch the output line, a signal input of a first register in the register chain being connected to the input line, and a signal input of a subsequent register in the register chain being connected to a respective signal output of a preceding register in the register chain, a clock input for the plurality of registers being connected to a respective clock line which can be used to transmit a sampling signal at a sampling frequency, the sampling frequency being higher than a maximum data transmission frequency of the data stream, and the switching device being connected to the register chain such that the output line can be switched to a logic level of the signal outputs of the plurality of registers when output signals which are produced at each of the signal outputs of the plurality of registers are at the same logic level.

Input filter stage for a data stream, and method for filtering a data stream

In the case of the storage or transmission of moving images, it is frequently necessary to reduce the large number of information items by means of suitable compression methods. In order to estimate the movement, the image to be coded is in this case split into blocks, and each of these reference blocks R is compared with blocks of the same size of the preceding image, and a movement information item is derived. Conventional methods for movement estimation in this case use all the pixels in the reference block R and in the search area S. Since this very complicated method requires very fast, and thus expensive, hardware, the so-called quincunx undersampling is applied to the search area S. In the case of the reference block R, one quincunx undersampled pixel is used for even parity of the movement vector and the other quincunx undersampled pixel is used for odd parity, depending on which position is being investigated. For the search area S, it is then necessary to store only half the pixels which are required for movement estimation. The memory requirement and the bandwidth of the memory are thus reduced by half.

Method and circuit arrangement for undersampling in the case of movement

A method of making a hierarchical estimate of image motion for a television signal. A television signal video image is divided into blocks of fixed size, and motion relative to a second video image is determined for each block. Mutually non-overlapping pixel blocks are produced at a lower, more finely resolved hierarchical level. The center points of these blocks are used as the points for an analysis at a level that is located higher in the hierarchy. Preferably, points which lie between image lines and which do not represent real picture elements in the line raster, are investigated in the mutually non-overlapping blocks.

Growing community of inventors

Gehrden, Germany

Michael Drexler