Analog Devices,inc.

Invensense, Inc.

Analog Devices International Unlimited Company

Michael Delaus

Thomas M Goida

Gilbert Lee Huppert

Kathleen O O'Donnell

Susan L Feindt

Kenneth Flanders

Edward F Gleason

Kathy O'Donnell

Matthew Duffy

Ryan Iutzi

Rama Krishna Kotlanka

A transfer printing method is described that can be used for a wide variety of materials, such as to allow for circuits formed of different materials to be integrated together on a single integrated circuit. A tether () is formed on dice regions () of a first wafer (), followed by attachment of a second wafer () to the tethers. The dice regions () are processed so as to be separated, followed by transfer printing of the dice regions to a third wafer ().

Method of transfer printing

Various low stress compact device packages are disclosed herein. An integrated device package can include a first integrated device die and a second integrated device die. An interposer can be disposed between the first integrated device die and the second integrated device die such that the first integrated device die is mounted to and electrically coupled to a first side of the interposer and the second integrated device die is mounted to and electrically coupled to a second side of the interposer. The first side can be opposite the second side. The interposer can comprise a hole through at least the second side of the interposer. A portion of the second integrated device die can extend into the hole.

Low stress compact device packages

A packaged microphone has a base, a lid coupled to the base forming an interior, a MEMS microphone secured to the base within the interior, and an integrated circuit embedded in the base. Apertures in the base and integrated circuit are aligned to form an aperture from the exterior of the package to the interior.

Microphone package with embedded ASIC

A packaged microphone has a base with a top face, a lid coupled to the base and forming an interior, and a MEMS microphone (i.e., a die or chip) secured to the top face of the base within the interior. The packaged microphone also includes a circuit chip secured to the top face of the base within the interior. The circuit chip has a top surface with a top pad, a bottom surface with a bottom pad, and a via. The bottom pad is electrically connected to the base, and the via electrically connects the top pad with the bottom pad. A wire bond is connected between the MEMS microphone and the top pad on the circuit chip. The MEMS microphone is electrically connected to the bottom pad and the base through the via.

Packaged microphone with reduced parasitics

A thin film resistor fabrication method requires that an IC's active devices be fabricated on a substrate, and a dielectric layer be deposited over the devices to protect them from subsequent process steps. A layer of thin film material is deposited next, followed by a barrier layer and a first layer of metal. These three layers are patterned and etched to form isolated material stacks wherever a TFR is to be located, and a first level of metal interconnections. The first metal layer is removed from the TFR stacks, and the barrier layer is patterned and etched to provide respective openings which define the active areas of each TFR. In a preferred embodiment, a dielectric layer is deposited after the first metal layer is removed, to protect the interconnect metal from corrosion and as an adhesion layer for the patterning of the openings which define resistor length. Once the TFRs are completed, a dielectric layer is preferably deposited, vias to the first layer of metal are patterned and etched, and a second metal layer is deposited, patterned and etched to provide a second layer of metal interconnections.

Thin film resistor fabrication method

An IC resistor and capacitor fabrication method comprises depositing a dielectric layer over existing active devices and metal interconnections on an IC substrate. In a preferred embodiment, a layer of thin film material suitable for the formation of thin film resistors is deposited next, followed by a metal layer that will form the bottom plates of metal-dielectric-metal capacitors. Next, the capacitors' dielectric layer is deposited to a desired thickness to target a particular capacitance value, followed by the deposition of another metal layer that will form the capacitors' top plates. The metal layers, the capacitor dielectric layer, and the thin film material layer are patterned and etched to form TFRs and metal-dielectric-metal capacitors as desired on the IC substrate. The method may be practiced using any of several alternative process sequences. For example, the bodies of the TFRs can be formed before the deposition of the capacitors' layers. Also, the capacitors' bottom plates may be patterned and etched prior to doing the same for their top plates.

Growing community of inventors

Andover, MA, United States of America

Michael Delaus