Intel Corporation

Freescale Semiconductor,inc.

Michael David Vicker

Daniel B Schwartz

Werner Schelmbauer

Mohammed Alam

Samir J Soni

Uday Padmanabhan

John J Parkes, Jr

James Riches

Dong-Jun Yang

Yiwen Chen

Ricardo Fernandez

A wireless communication device can include an antenna array configured to receive a plurality of radio frequency (RF) signals, RF circuitry, and digital baseband receive circuitry. The RF circuitry is configured to process the plurality of RF signals received via the antenna array to generate a single RF signal. The digital baseband receive circuitry is coupled to the RF circuitry and is configured to generate a downconverted signal based on the single RF signal, amplify the downconverted signal to generate an amplified downconverted signal, and convert the amplified downconverted signal to generate a digital output signal for processing by a wireless modem. The digital baseband receive circuitry further includes at least a first filtering system configured to filter the downconverted signal prior to amplification.

High-performance receiver architecture

A data recovery circuit includes a pulse width indicator circuit, an edge detection circuit and a first storage. The pulse width indicator circuit is configured to receive, at an input, a data stream and provide pulses, at respective outputs, that are indicative of respective data bits in the received data stream. The edge detection circuit is configured to receive, on respective inputs, the pulses from the pulse width indicator circuit and provide respective storage signals, on respective outputs that are indicative of a logic level of the respective data bits, responsive to the pulses. The first storage is configured to receive and store the respective storage signals.

Techniques for asynchronous data recovery

Growing community of inventors

Chandler, AZ, United States of America

Michael David Vicker