Loral Fairchild Corporation

Michael D Witchey

A method and system for scheduling multiple channel data output. A multi-channel data processor stores ATM cells received from a network data input stream in channel FIFOs of a cell buffer. The input interval between cells received at a channel FIFO and the channel FIFO fullness is monitored to determine an optimum cell output interval for each channel. This optimum cell output interval is established such that the rate at which cells are output is substantially constant compared to the input cell rate and drives each channel FIFO fullness towards a nominal value. Optimum cell departure times are then calculated based on the optimum cell output interval for each channel. These optimum cell departure times are sorted and prioritized to create an overall optimum cell transmission schedule. By removing cells from channel FIFOs according to this optimal cell transmission schedule, data returns to the network having a restored temporal sequence in each channel without requiring embedded timing information. Establishing an output rate and sequence which optimizes FIFO fullness and minimizes gaps in the output data, also reduces buffering requirements for downstream network equipment.

Method and system for processing multiple channel data

A high speed asynchronous data multiplexer/demultiplexer system which multiplexes a quantity of independent and asynchronous data streams into a single packetized data stream and then demultiplexes and presents the original input signals at a remote site in their original form is described. The output bit rate of the demultiplexer is generated responsive to the packet arrival frequency of data from each particular channel and the output buffer fullness of that channel. This process reduces the amount of processing required, such that the effective bandwidth of the system can be greatly expanded.

Growing community of inventors

Sarasota, FL, United States of America

Michael D Witchey