Intel Corporation

Michael D Tucknott

Robert S Chappell

David W Burns

Hermann Gartler

John Faistl

Rajesh S Parthasarathy

Raanan Sade

Shlomo Raikin

Igor Yanover

Prakash Math

Pankaj Raghuvanshi

Michael S Bair

Rajesh S Parathasarthy

Leslie A Ong

A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.

Method and apparatus for bus lock assistance

In one embodiment, the present invention includes a method for identifying a termination sequence for an atomic memory operation executed by a first thread, associating a timer with the first thread, and preventing the first thread from execution of a memory cluster operation after completion of the atomic memory operation until a prevention window has passed. This method may be executed by regulation logic associated with a memory execution unit of a processor, in some embodiments. Other embodiments are described and claimed.

Regulating atomic memory operations to prevent denial of service attack

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Hillsboro, OR, United States of America

Michael D Tucknott