Dallas Semiconductor Corporation

Motorola Corporation

Advanced Micro Devices Corporation

Thomson Components-mostek Corporation

Michael D Smith

Michael R Conboy

Michael R Williamson

Roger A Whatley

Mark L Thrower

Wendell L Little

Gerald L Goff

Frank A Whiteside

James A Miller

Andrew S Olesin

Charles E Barker

David W Duehren

A transmission line sampling circuit for a T1 line is disclosed. A multi phase oscillator is connected to a plurality of state machines which are connected in parallel to a transmission line. The use of a plurality of state machines to sample the transmission line effectively increases the sample rate of the transmission line beyond that which can ordinarily be supported by a single phase oscillator running at the same frequency of the multi phase oscillator. The outputs of the plurality of state machines are provided to an arbitrator and to a MUX wherein the arbitrator decides which of the four state machines outputs should be switched through the MUX and produced transmitted on an output line.

Oversampled state machine for jitter tolerant pulse detection

The present invention overcomes the shortcomings and deficiencies of the prior art by providing a circuit for processing an AC signal having a peak to peak envelope associated therewith, this circuit including structure for detecting the upper edge of the peak to peak envelope of the AC signal, structure for detecting the lower edge of the peak to peak envelope of the AC signal, structure for sampling the AC signal at a mid range upper point, and structure for sampling the AC signal at a mid range lower point.

Differential cross coupled peak detector

A circuit and method of adjusting a sample point for a data stream to account for intersymbol interference is disclosed herein. The system averages the amount of intersymbol interference occurring for a specific data pattern and uses this average value which reflects a phase difference between the leading edges of two pulses to determine at which clock count a sync pulse should issue to sample and read a data value.

Apparatus for adjusting sample points based upon measured intersymbol

A ones bit density monitor is disclosed which is comprised of a 31-bit shift register, a counter, and a clock circuit having logic to preclude the number representing a number of pulses within the shift register from changing whenever a pulse is simultaneously input and output from the 31-bit shift register. To accomplish this, the counter increments every time a pulse is input to the 31-bit shift register and is decremented every time a pulse is output from the 31-bit shift register. Once the count reaches the number four, the ones density monitor circuit, and more specifically the counter, outputs a signal reflecting that a carrier is back on line.

Ones density monitor

The invention provides an apparatus for supporting a workpiece during the manufacturing process involving the workpiece and a process for manufacturing a workpiece using the apparatus. The apparatus includes a holding device for maintaining the workpiece in a predetermined orientation during performance of the manufacturing process. The holding device includes a plurality of members. The improvement comprises at least one member of the plurality of members including a plurality of indicators arranged in a predetermined order to establish an identifying code. Each indicator of the plurality of indicators absorbs a predetermined portion of incident light.

Workpiece monitoring process using a workpiece carrier having an

An integrated circuit terminator for a SCSI bus with resistors made of laser-blowable fuses in an array and a reference voltage source made with a bandgap generator and a two stage amplifier including a dummy isolation stage for providing symmetrical mismatch currents.

Operational amplifier having dummy isolation stage

The present invention overcomes the aforementioned shortcomings and deficiencies of the prior art by providing a circuit for processing an AC signal having a peak to peak envelope associated therewith, this circuit including structure for detecting the upper edge of the peak to peak envelope of the AC signal, structure for detecting the lower edge of the peak to peak envelope of the AC signal, structure for sampling the AC signal at a mid range upper point, and structure for sampling the AC signal at a mid range lower point.

The invention provides an improved apparatus for supporting a workpiece during the manufacturing process involving the workpiece. The apparatus includes a holding device for maintaining the workpiece in a predetermined orientation during performance of the manufacturing process. The holding device includes a plurality of members. The improvement comprises at least one member of the plurality of members including a plurality of indicators arranged in a predetermined order to establish an identifying code. Each indicator of the plurality of indicators absorbs a predetermined portion of incident light.

Quartz marking system

A bidirectional voltage to current converter circuit with extended dynamic range includes a first and second operational amplifier in which the input voltage terminal is connected to the negative input of both operational amplifiers. The outputs of the operational amplifiers each directly drive the gates of two transistors which operate as a current mirror circuit. The current mirror transistors associated with the first operational amplifier are p-channel transistors with their sources connected to VDD, and the two transistors driven by the second operational amplifier are n-channel transistors with their sources connected to ground. The drains of the first p-channel transistor and the first n-channel transistor are coupled back to the positive inputs of the first and second operational amplifiers respectively; and also each drain is separately connected to one end of a resistor, the other ends of the two resistors are connected together and to a reference voltage. The drains of the second p-channel transistor and the second n-channel transistor are connected together to form a current output terminal.

Transistor circuit for use in a voltage to current converter circuit

Voltage to current converter with extended dynamic range

A test fixture for a boat having a plurality of slots for holding wafers includes a base for fixedly holding a boat to be tested; a wafer simulator, which wafer simulator includes a plurality of wafers sized to properly seat in the plurality of slots in the boat; structure for moving the plurality of wafers of the wafer simulator wholly into and out of the plurality of slots in the boat; and structure determining whether the plurality of wafers is properly seated in the plurality of slots in the boat when the wafer simulator is moved wholly into the plurality of slots in the boat.

Boat test apparatus

SCSI terminator

An apparatus is disclosed for automatic optical inspection of a wafer boat having a plurality of parallel slotted side rods and bottom rods. A cradle holds the wafer boat in a stationary position. A separate optical sensor is mounted upon a carriage for each of the rods to be measured. Each of these sensors projects an optical beam toward the corresponding rod where, when longitudinally aligned within an individual slot, the beam is parallel to and substantially near the bottom of the slot. As the carriage is scanned from one end of the rods of the wafer boat to the other, the optical beam will be alternately obstructed by the rod or transmitted through a slot, thereby determining the slot edge locations of each of the slots in each of the rods in accordance with the position of the carriage. The slot widths and slot locations can then be determined from the slot edge locations. Additionally, the length of each of the bottom rods can be measured by reflecting an optical beam off of a flat surface of a clamp block positioned against the end of each of the bottom rods.

Growing community of inventors

Lewisville, TX, United States of America

Michael D Smith