Tektronix, Inc.

Omneon Video Networks

Harmonic, Inc.

Michael D Nakamura

Daniel G Baker

Michael S Overton

Barry A McKibben

Scott E Zink

John C Reynolds

Evan Albright

Bruce J Penney

Howard A Landsman

A flexible timebase for eye diagrams uses a stable free running oscillator as a sample clock for equivalent time sampling of an input serial digital signal and of a reference signal, derived from a subdivided recovered clock of the input serial digital signal. The reference signal samples are provided to a digital phase-locked loop that provides the flexible timebase to an eye pattern generator. The eye pattern generator accumulates the input serial digital signal samples at times corresponding to the reference signal samples to produce the eye diagram. A linear phase detector in the digital phase locked loop converts the reference signal samples to a complex signal using a Hilbert transform and then to a linear ramp of phase values using a CORDIC algorithm with arctangent lookup table. A subtractor then subtracts the digital phase-locked loop feedback from the linear ramp to provide the input to the loop filter.

Flexible timebase for eye diagram

A flexible timebase for eye diagrams uses a stable free running oscillator as a sample clock for equivalent time sampling of an input serial digital signal and of a reference signal derived from a subdivided recovered clock of the input serial digital signal. The reference signal samples are provided to a digital phase-locked loop that provides the flexible timebase to an eye pattern generator. The eye pattern generator accumulates the input serial digital signal samples at times corresponding to the reference signal samples to produce the eye diagram. A linear phase detector in the digital phase locked loop converts the reference signal samples to a complex signal using a Hilbert transform and then to a linear ramp of phase values using a CORDIC algorithm with arctangent lookup table. The digital phase-locked loop feedback is subtracted from the linear ramp to provide the input to the loop filter.

Flexible timebase for EYE diagram

A method and apparatus to switch between two audio streams without creating a clicking transient. A first serial audio stream is brought into a serial shift register. A series of samples of that audio stream are multiplied by reducing coefficients until a contribution of the first audio stream reaches zero. Then, a second serial audio stream is brought into the serial shift register. Increasing coefficients are applied to a series of samples until a contribution of the second audio stream is one.

Method and apparatus to eliminate audible clicking transients when switching audio streams

A method and apparatus for retiming video. Vertical synchronization information (VSI) is detected in an incoming video stream. A VSI is also detected in both as output video stream and a reference video stream. Based on the difference between the VSI of the reference and output video stream reads or writes to a FIFO are suppressed until the VSI's are coincident.

Video retiming through dynamic FIFO sizing

A digital clock generation system provides both a digital composite clock and a digital component clock synchronized with an input synchronization video signal. The digital composite clock is generated from the burst portion of the input synchronization video signal, and the digital component clock is synthesized from the digital composite clock. A frame timing pulse is generated at regular intervals from the composite sync of the input video signal for resetting the digital component clock to establish a defined phase relationship between the digital composite and component clocks according to an offset constant.

Digital video clock generation system

A signal processing apparatus comprises first and second switches connected respectively to an input terminal and an output terminal of the apparatus and defines first and second signal channels extending in parallel from the first switch to the second switch. The first and second switches are operable to connect a selected one of the signal channels between the input terminal and the output terminal. The first signal channel includes a signal processor, such as a frame synchronizer. The input terminal is connected to the signal processor even when the second channel is selected for connecting the input terminal to the output terminal so that a signal applied to the input terminal is applied to the signal processor as well as to the output terminal when the second channel is selected. Thus, the signal processor can be exercised and the output of the signal processor can be monitored while the second channel is utilized for transmitting a signal from the input terminal to the output terminal.

Signal processing apparatus and method of operating such apparatus

A circuit for providing a signal which is clamped to a desired DC voltage level comprises an amplifier for receiving an input signal and a feedback loop for developing an offset signal for combination with the input signal by the amplifier to provide an output signal at the desired DC voltage level. The feedback loop includes a noise detector for detecting the level of noise present in the output signal, and adjusting the time constant of the feedback loop in dependence thereon.

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Portland, OR, United States of America

Michael D Nakamura