Tensilica, Inc.

Michael Carchia

Hongbin Ji

An advanced data structure allows lookup based upon the most significant 16 bits and the following variable number of K bits of the IP destination address. This 16/K scheme requires less than 2 MB memory to store the whole routing tables of present day backbone routers. A 16/Kc version utilizes bitmaps to compress the table to less than 0.5 MB. For the 16/K data structure each route lookup requires at most 2 memory accesses while the 16/Kc requires at most 3 memory accesses. By configuring the processor properly and developing a few customized instructions to accelerate route lookup, one can achieve 85 million lookups per second (MLPS) in the typical case with the processor running at 200 MHz. Further, the lookup method can be implemented using pipelining techniques to perform three lookups for three incoming packets simultaneously. Using such techniques, 100 MLPS performance can be achieved.

Fast IP route lookup with 16/K and 16/Kc compressed data structures

A novel solution for fast packet classification includes a novel data structure to store classifier rules which enables fast packet classification, which structure employs bitmaps for each field of the incoming packet for which classification is desired. A fast packet classification algorithm using the novel data structure allows the matching rule with the highest priority to be quickly obtained. A novel rule update algorithm allows new classifier rules to be added into the data structure incrementally. In one practical implementation of a classification engine employing the structures and algorithms of the present invention, a configurable processor with customized instructions is used to accelerate packet classification.

Growing community of inventors

Santa Clara, CA, United States of America

Michael Carchia