International Business Machines Corporation

Infineon Technologies Ag

Other

Crocus Technology Inc.

Michael C Gaidis

Anthony J Annunziata

Sivananda K Kanakasabapathy

Janusz Jozef Nowak

Chih-Chao Yang

Lawrence Alfred Clevenger

Carl John Radens

Timothy Joseph Dalton

Daniel Christopher Worledge

Eugene John O'Sullivan

Louis L C Hsu

David William Abraham

Keith Kwong Hon Wong

Solomon Assefa

Rohit Kilaru

Eric Andrew Joseph

John Kenneth DeBrosse

Luc Thomas

John Patrick Hummel

Keith Kwong-Hon Wong

Chanro Park

Matthew Earl Colburn

William Joseph Gallagher

Jonathan Zanhong Sun

Philip Louis Trouilloud

Gregory Costrini

Stephen L Brown

Walter Glashauser

Joel D Chudow

Greg Costrini

Joachim Nuetzel

Alexander J Gaidis

Louis L Hsu

Lubomyr Taras Romankiw

Rainer Leuschner

David Lee Rath

John Christopher Arnold

Wolfgang Raberg

Stuart Stephen Papworth Parkin

Michael F Lofaro

Xian Jay Ning

Christy Sensenich Tyberg

Arunava Gupta

Chandrasekhar Sarma

Judith Marie Rubino

Kia-Seng Low

Ihar Kasko

Erwan Gapihan

Thao Tran

Keith Raymond Milkove

John K Debrosse

Frank Findeis

Keith K H Wong

Phillip L Trouilloud

Christian Arndt

Anthony J Annuziata

Eugene J O'sullivan

An apparatus has a reference magnetic tunnel junction with a high aspect ratio including a reference layer with magnetization along a minor axis and a storage layer with magnetization along a major axis. The storage layer magnetization is substantially perpendicular to the magnetization along the minor axis. The magnetization orientation between the minor axis and the major axis is maintained by shape anisotropy caused by the high aspect ratio.

MRAM reference cell with shape anisotropy to establish a well-defined magnetization orientation between a reference layer and a storage layer

Embodiments are directed to STT MRAM devices. One embodiment of an STT MRAM device includes a reference layer, a tunnel barrier layer, a free layer and one or more conductive vias. The reference layer is configured to have a fixed magnetic moment. In addition, the tunnel barrier layer is configured to enable electrons to tunnel between the reference layer and the free layer through the tunnel barrier layer. The free layer is disposed beneath the tunnel barrier layer and is configured to have an adaptable magnetic moment for the storage of data. The conductive via is disposed beneath the free layer and is connected to an electrode. Further, the conductive via has a width that is smaller than a width of the free layer such that a width of an active STT area for the storage of data in the free layer is defined by the width of the conductive via.

Spin transfer torque cell for magnetic random access memory

A method of forming a memory device that in one embodiment may include forming a magnetic tunnel junction on a first electrode using an electrically conductive mask and subtractive etch method. Following formation of the magnetic tunnel junction, at least one dielectric layer is deposited to encapsulate the magnetic tunnel junction. Ion beam etching/Ion beam milling may then remove the portion of the at least one dielectric layer that is present on the electrically conductive mask, wherein a remaining portion of the at least one dielectric layer is present over the first electrode. A second electrode may then be formed in contact with the electrically conductive mask.

Method of forming an on-pitch self-aligned hard mask for contact to a tunnel junction using ion beam etching

A technique relates to a linear magnetoresistive random access memory (MRAM) device. A linear magnetic tunnel junction structure includes a non-magnetic tunnel barrier on top of a free layer and a reference layer on top of the non-magnetic tunnel barrier, where the linear magnetic tunnel junction structure is in a line. Bottom contacts are separated from one another by a column space while the plurality of bottom contacts are self-aligned to the linear magnetic tunnel junction structure, such that the plurality of bottom contacts are in the line with and underneath the linear magnetic tunnel junction structure. The bottom contacts abut a bottom of the linear magnetic tunnel junction structure. MRAM devices are formed by having non-conducting parts of the free layer isolating individual interfaces between the bottom contacts and the free layer. The MRAM devices are formed in the line of the linear magnetic tunnel junction structure.

Linear MRAM device with a self-aligned bottom contact

A technique relates to an MRAM system. A conformal film covers trenches formed in an upper material. The upper material covers conductive islands in a substrate. The conformal film is selectively etched to leave sidewalls on the trenches. The sidewalls are etched into vertical columns self-aligned to and directly on top of the conductive islands below. A filling material is deposited and planarized to leave exposed tops of the vertical columns. An MTJ element is formed on top of the filling material and exposed tops of the vertical columns. The MTJ element is patterned into lines corresponding to the vertical columns, and each of the lines has a line MTJ element self-aligned to one of the vertical columns. Line MRAM devices are formed by patterning the MTJ element into the lines. Each of line MRAM devices respectively include the line MTJ element self-aligned to the one of the vertical columns.

Injection pillar definition for line MRAM by a self-aligned sidewall transfer

A technique is provided for a thermally assisted magnetoresistive random access memory device. A magnetic tunnel junction is formed. Contact wiring having a top contact electrode and a bottom contact electrode is formed. The contact wiring provides write bias to heat the magnetic tunnel junction. A multilayer dielectric encapsulant is configured to retain the heat within the magnetic tunnel junction.

Thermally assisted MRAM with a multilayer encapsulant for low thermal conductivity

A method for fabricating a synthetic antiferromagnetic device, includes depositing a reference layer on a first tantalum layer and including depositing a first cobalt iron boron layer, depositing a second cobalt iron boron layer on the first cobalt iron boron layer, depositing a second Ta layer on the second cobalt iron boron layer, depositing a magnesium oxide spacer layer on the reference layer and depositing a cap layer on the magnesium oxide spacer layer.

Method for fabricating synthetic antiferromagnetic (SAF) device

A memory device includes a first nanowire, a second nanowire and a magnetic tunnel junction device coupling the first and second nanowires.

Magnetic domain wall shift register memory device readout

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Wappingers Falls, NY, United States of America

Michael C Gaidis