Spansion Llc.

Advanced Micro Devices Corporation

Fujitsu Corporation

Cypress Semiconductor Corporation

Michael A VanBuskirk

Colin Stewart Bill

Suzette Keefe Pangrle

Nicholas H Tripsas

Tzu-Ning Fang

Uzodinma Okoroanyanwu

Zhida Lan

Mark W Randolph

Hiroyuki Kinoshita

Wei Zheng

Yi He

Tazrien Kamal

David Michael Rogers

Mimi Xuefeng Qian

Kwadwo A Appiah

Nian Niles Yang

Matthew S Buynoski

Steven C Avanzino

Takao Akaogi

Johnny C Chen

Darlene G Hamilton

Binh Quang Le

Aaron Lee

Juri Krieger

Nancy S Leong

Guowei Wang

Tiao-Hua Kuo

Stuart Spitzer

Aaron Mandell

Sachit Chandra

Wei Daisy Cai

Shigekasu Yamada

Nancy Leong

Johnny Chen

A semiconductor device () for improved charge dissipation protection includes a substrate (), a layer of semiconductive or conductive material (), one or more thin film devices () and a charge passage device (). The thin film devices () are connected to the semiconductive or conductive layer () and the charge passage device () is coupled to the thin film devices () and to the substrate () and provides a connection from the thin film devices () to the substrate () to dissipate charge from the semiconductive/conductive layer () to the substrate ().

Method and apparatus for protection against process-induced charging

A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.

Method of providing an erase activation energy of a memory device

The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers&#x2014;respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.

Stacked organic memory devices and methods of operating and fabricating

The present disclosure adjusts the voltage threshold values of select gates of NAND strings. The select gates of the NAND string can be read, erased, and programmed.

Non-volatile memory device and methods of using

A metal sulfide based non-volatile memory device is provided herein. The device is comprised of a substrate, a backplane, a planar memory media including a dense array of metal sulfide based memory cells, and a MEMS probe based actuator. The cells of the memory device are operative to be of two or more states corresponding to various levels of impedance. The MEMS actuator is operable to position micro/nano probes over the appropriate cells to enable reading, writing, and erasing the memory cells by applying a bias voltage.

Using organic semiconductor memory in conjunction with a MEMS actuator for an ultra high density memory

A method is provided for programming a nonvolatile memory array including an array of memory cells, where each memory cell including a substrate, a control gate, a charge storage element, a source region and a drain region. The method includes receiving a programming window containing a predetermined number of bits that are to be programmed in the array and determining which of the predetermined number of bits are to be programmed in the memory array. The predetermined number of bits are simultaneously programmed to corresponding memory cells in the array. A programming state of the predetermined number of bits in the array is simultaneously verified.

High performance flash memory device capable of high density data storage

Systems and methodologies are provided for of enabling a polymer memory cell to exhibit variable retention times for stored data therein. Such setting of retention time can depend upon a programming mode and/or type of material employed in the polymer memory cell. Short retention times can be obtained by programming the polymer memory cell via a low current or a low electrical field. Similarly, long retention times can be obtained by employing a high current or electrical field to program the polymer memory cell.

Polymer memory device with variable period of retention time

The present memory structure includes thereof a first conductor, a second conductor, a resistive memory cell connected to the second conductor, a first diode connected to the resistive memory cell and the first conductor, and oriented in the forward direction from the resistive memory cell to the first conductor, and a second diode connected to the resistive memory cell and the first conductor, in parallel with the first diode, and oriented in the reverse direction from the resistive memory cell to the first conductor. The first and second diodes have different threshold voltages.

Diode array architecture for addressing nanoscale resistive memory arrays

An organic memory cell made of two electrodes with a selectively conductive media between the two electrodes is disclosed. The selectively conductive media contains an organic layer and passive layer. The selectively conductive media is programmed by applying bias voltages that program a desired impedance state for a memory cell. The desired impedance state represents one or more bits of information and the memory cell does not require constant power or refresh cycles to maintain the desired impedance state. Furthermore, the selectively conductive media is read by applying a current and reading the impedance of the media in order to determine the impedance state of the memory cell. Methods of making the organic memory devices/cells, methods of using the organic memory devices/cells, and devices such as computers containing the organic memory devices/cells are also disclosed.

Erasing and programming an organic memory device and method of fabricating

The present invention facilitates semiconductor devices by aiding the efficiency in the way individual devices change states in a semiconductor array. State change voltages can be applied to a single device in the array of semiconductor devices without the need for transistor-type voltage controls. The diodic effect of the present invention facilitates this activity by allowing specific voltage levels necessary for state changes to only occur at the desired device. In this manner, an array of devices can be programmed with varying data or states without utilizing transistor technology. The present invention also allows for an extremely efficient method of producing these types of devices, eliminating the need to manufacture costly external voltage controlling semiconductor devices.

Control of memory arrays utilizing zener diode-like devices

Methods that facilitate control of memory arrays utilizing zener diode-like devices

Growing community of inventors

Saratoga, CA, United States of America

Michael A VanBuskirk