U.S. Philips Corporation

Michael A Stekelenburg

Hermanus L Peek

Johannes Hjm Van Rooij

Alouisius W Korthout

Colm J Sweeney

The flare compensation range of a camera is substantially increased by measuring and averaging a substrate or drain current representing an amount of charge elements generated in an image sensor, which is subsequently subtracted from the output signal of the image sensor.

Flare compensation

A 3-phase charge-coupled imaging device is operated in the interlace mode. During integration, voltages are applied to the clock electrodes such that charge is integrated below the same set of electrodes each time. The signal charges of the first field are formed in that 3/4 portion of the charge in each picture element is augmented by 1/4 portion of the charge of the preceding picture element, while the signal charges of the second field are formed in that the 3/4 portion is augmented by 1/4 portion of the charge generated in the following picture element. These summations may be carried out in the sensor itself in that the charge packages are shifted to the left and right during integration. The flicker which is usually the result of interlacing is very strongly reduced in this way.

Charge-coupled imaging device camera provided with such an imaging device

A charge-coupled imaging device has a width/height ratio which is adjustable since a number of columns situated in two strips on either side of the sensor are not used. The charge generated in these columns is placed in the horizontal output register simultaneously with the active information which is to be used, and is drained off in the flyback time between consecutive active line times through the output of the output register. Since the non-active strips are situated on either side of the sensor, the location of the center of the active portion of the matrix is fixed, independent of whether the information from the said strips is or is not used, so that in every state of the sensor this center coincides with the optical center of the optical system used.

Solid state imaging device having an adjustable width/height ratio

In CCD's, the major part of the dark current is caused by surface states. This dark current is disturbing, especially in image sensors, because the sensitivity of the camera is limited thereby. When according to the invention the integrating gates are varied periodically, the subjacent surface parts of the - buried - channel being brought periodically into inversion and into depletion, while maintaining the charge-containing capacity, a considerable reduction of the dark current can be obtained. In image sensors, voltage variation preferably occurs during the fly-back time.

Charge-coupled device, image sensor arrangement and camera provided with

A control circuit for a clock electrode of an integrated circuit includes two semiconductor switches (TP, TN) which are controllable from a clock pulse generator (CG) and via which semiconductor switches one of two direct voltages (+Va, oV) is periodically applied to a clock electrode (E), constituting a capacitive load, of an integrated circuit (IC). In order to reduce the energy dissipation, the clock electrode is connected to ground via a series arrangement (LC) of an inductance (L) and a capacitance (C). The clock pulse generator triggers the switches (TP, TN) in a manner such that the switches are successively conductive with an interval thereinbetween in which both switches are non-conductive. As a result, a resonant circuit (L, C, CE) consisting of the inductance (L), the capacitance (C) and the clock electrode capacitance (CE) is active during the in between intervals.

Control circuit for at least one clock electrode of an integrated circuit

The converter comprises a pick-up device (PD) for picking up a negative (PH), a picture signal processing circuit (PC) for obtaining a picture signal via a signal inversion (IN) and fixing at a black level and a white level, which signal is suitable for display on a television display screen (TVD), and a time signal generator (TG) for supplying at least one adjusting signal (WS) to a black level adjusting circuit (BA). To realize a simple adjustment, the negative (PH) can be picked up by a sensor (FT) in the converter with a picture content part (PP) and beyond it a bright part (WP) by way of a sequential or simultaneous pick-up, respectively, while the sensor (FT) has a black level reference member (BR). Essential is the use of the adjusting gate signal (WS) for the black level adjusting circuit (BA) when the said bright part (WP) is being picked up.

Converter for a photographic, slide, or cinematographic

In a sensor circuit, a sensor device (CTD) is followed by a sampling circuit (CDS) for performing a correlated double signal sampling, having capacitors (C1', C2') and two switches (S1, S2). For simply realizing a rigid coupling between a sensor output signal (PS) and sampling clock pulses (CL, SA), the circuit includes a clock pulse shaper (CST), two inputs (CT1, CT2) of which receive two out of at least three control clock pulse signals (C1, C2, C3) for controlling an output transport in an output shift register (SR).

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Eindhoven, Netherlands

Michael A Stekelenburg