Intel Corporation

Michael A Stapleton

John A Dickerson

Jeffery James Olsen

Bernard W Boland

Edward Paul Osburn

Robert J Greiner

Philip Wayne Doberenz

Wen Wei

Bruce W Rose

Matthew M Ma

Richard F Guarnero

Jeffrey J Olsen

Embodiments of the present invention describe a system and method for microprocessor power regulation. An appropriate amount of voltage is provided to a microprocessor based on a voltage identifier (VID) received by a voltage controller from the microprocessor via a serial communication line. A voltage identifier clock signal (VIDClock) is used for the timing of transmission and receipt of data/acknowledgement signals. A guard clock signal (VIDGuard) is provided via a separate guard clock line to prevent potential noise on the clock line from causing a clock signal misidentification, which could cause a wrong value to be received as the VID. VIDGuard is analyzed in relation to ViDClock to verify the value of the clock signal. To verify receipt of the VID data, a voltage identifier acknowledgement line (VIDAck) is transmitted from the voltage regulator to the microprocessor. The acknowledgement signal is checked by a two-part receipt verification, high-to-low and low-to-high.

System and method for communicating device information between a device and a controller

A voltage sequencer includes an input terminal and an output terminal and a control element connected between the input an output terminals. A capacitive element is connected between the output terminal and a first voltage and a resistive element is connected between the output terminal and a second voltage. The control element selectively controls charging and discharging of the capacitive element such that, upon the voltage at the input terminal increasing from the first voltage to a nominal value, the output terminal voltage increases to a nominal value in a first predetermined period of time and upon the voltage at the input terminal decreasing from the nominal value to the first voltage, the output terminal voltage decreases to the first voltage value in a second predetermined period of time, the first predetermined period of time being different from, for example, substantially greater than, the second predetermined period of time. The capacitive element may be a capacitor and the resistive element may be a resistor. The first voltage may be a ground potential while the second voltage may be a positive potential with respect to the first voltage.

Voltage sequencing arrangements providing first and second voltages sequenced to each other in time

A system includes a processor, a voltage regulator and a circuit. The processor uses a first supply voltage to furnish a first indication of a second supply voltage to be received by the processor. The voltage regulator furnishes the second supply voltage in response to both the first indication and a second indication that the first supply voltage is valid. The circuit provides the second indication and regulates a timing of the second indication to prevent the voltage regulator from furnishing the second supply voltage until a predefined interval of time has elapsed after the first supply voltage becomes valid.

Circuit to indicate the status of a supply voltage

A radial base heatsink is provided to dissipate heat from a heat source. Such a heatsink comprises a cylindrical core; and a plurality of cooling fins projecting outwardly from the cylindrical core and defining a series of channels in a substantially radial pattern with a fin orientation relative to a center line of the cylindrical core, for dissipating heat generated from a heat source, via the cylindrical core.

Radial base heatsink

A computer receives a sleep signal that instructs the computer to enter a sleeping state in which stand-by power from a power source is needed. The computer generates a control signal that initiates delivery of stand-by power from the power source in connection with the computer's entering the sleeping state. The control signal is asserted in at least one situation in which the sleep signal is asserted, and the control signal is not asserted in at least one other situation.

Controlling power for a sleeping state of a computer to prevent overloading of the stand-by power rails by selectively asserting a control signal

The present invention provides a method or process for determining a load line based variable voltage input for an Integrated Circuit (IC) product. More particularly, the present invention provides a method/process for determining a variable load line that defines voltage input (Vcc) as a function of current draw (Icc) for an IC product. In one embodiment, the method includes defining a minimum voltage relative to a reference voltage level for an IC product at a maximum current draw Icc of the IC product. A maximum voltage relative to the reference voltage level for the IC product, at a minimum current draw Icc of the IC product, is also defined. Next, a load line based upon the maximum and minimum voltages and current draws, respectively, is calculated. The load line defines the voltage requirements for the IC product as a function of current draw Icc.

Method for determining a load line based variable voltage input for an integrated circuit product

A method includes converting a first voltage into a second voltage. The second voltage is routed to a power supply line when the second voltage exceeds a first predefined threshold, and the second voltage is isolated from the power supply line when the first voltage decreases below a second predefined voltage.

Supply voltage sequencing

A system includes a first power supply line that is associated with a first voltage level and a second power supply line that is associated with a second voltage level. A power supply is coupled to the first and second power lines to establish a first voltage of the first power supply line near the first voltage level and a second voltage of the second power supply line near the second voltage level. The power supply has a response during a time period after the activation or deactivation of the power supply in which the power supply does not maintain a difference between the first and second voltages within a predefined range. The system includes a circuit that is coupled to the first and second power supply lines to maintain the difference between the first and second voltages within the predefined range during the time period.

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Portland, OR, United States of America

Michael A Stapleton