International Business Machines Corporation

Michael A Leach

Carter W Kaanta

John Edward Cronin

Brian J Machesney

Edward J Nowak

William J Cote

Peter A Burke

James K Paulsen

Donald M Kenney

Michael L Kerbaugh

Pei-ing P Lee

Jeffrey A Robinson

Robert W Sweetser

Christopher R Whitaker

Daniel J Venditti

The present invention provides a conductive structure for use in semiconductor devices. The structure can be used to interconnect the various diffusion regions or electrodes of devices formed on a processed semiconductor substrate to a layer of metal, to interconnect overlying layers of metal or to provide the gate electrode of an FET device formed on the surface of a semiconductor substrate. Various embodiments of the invention are described, but in broad form the active metallurgy of the present invention comprises a thin continuous layer to titanium--titanium nitride and a thick layer of a refractory metal, e.g. tungsten, overlying the titanium nitride layer.

Refractory metal-titanium nitride conductive structures

The invention provides a method for producing a substantially planar surface overlying features of a semiconductor structure. The method comprises forming alternating layers of a hard polishing material and a soft polishing material over the features of the semiconductor structure, and then polishing the alternating layers to form a substantially planar surface over the features. The method takes advantage of the polish rates of the various materials used as alternating layers to enhance the planarization process.

Polishstop planarization structure

Polishstop planarization method and structure

The present invention relates to an apparatus for remotely detecting impedance adapted for use on a polishing machine wherein the end point of polishing for removing a surface layer during the processing of semiconductor substrates is detected. A first stationary coil having a high permeability core is wound having an air gap and an AC voltage is applied to the stationary coil to provide a magnetic flux in the air gap. A second coil is mounted for rotation on the polishing table, in a position to periodically pass through the air gap of the stationary coil as the table rotates. The second coil is connected at its opposite ends to contacts which are embedded in the surface of the polishing wheel. The contacts are positioned to engage the surface of the substrate being polished and provide a load on the second rotating coil when it is in the air gap of the stationary coil, will perturb the flux field therein as a function of the resistance of the load caused by the contacts contacting either a conducting surface or a non-conducting surface. This perturbance of the flux field is measured as a change in the induced voltage in the stationary coil which is converted to a signal processed to indicate the end point of polishing, the end point being when a metallic layer has been removed to expose a dielectric layer or when a dielectric layer has been removed to expose a metallic layer.

Device for detecting an end point in polishing operations

The present invention relates to a method and apparatus for remotely detecting impedance. It is specifically adapted for use on a polishing machine wherein the end point of polishing for removing a surface layer during the processing of semiconductor substrates is detected. A first, or stationary coil having a high permeability core is wound having an air gap and an AC voltage is applied to the stationary coil to provide a magnetic flux in the air gap. A second coil is mounted for rotation on the polishing table, in a position to periodically pass through the air gap of the stationary coil as the table rotates. The second coil is connected at its opposite ends to contacts which are embedded in the surface of the polishing wheel. The contacts are positioned to engage the surface of the substrate which is being polished and provide a load on the second or rotating coil. The rotating coil, when it is in the air gap of the stationary coil, will perturb the flux field therein as a function of the resistance of the load caused by the contacts contacting either a conducting surface or a non-conducting surface. This perturbance of the flux field is measured as a change in the induced voltage in the stationary coil which in turn is converted to a signal which is processed to indicate the end point of polishing, the end point being when a metallic layer has been removed to expose a dielectric layer therebeneath or, conversely, when a dielectric layer has been removed to expose a metallic layer therebeneath.

Device and method for detecting an end point in polishing operation

A method for forming an electrically conductive line between two layers of insulating material and method for connecting the line through both layers of the insulating material to the opposite surfaces is provided. In the method, first, second and third layers of insulating material are provided wherein the first and third layers are separated by the second layer of insulating material which is different in etch rate from the first and third layers. The edge portion of all three layers is exposed and the insulating layer of the second material is selectively etched to remove the revealed edge portion and provide a slot between the first and third layers of insulating material. Also openings are provided in both the first and third layers of insulating material which communicate with the slot and extend respectively through the layers of the first and third insulating material. Thereafter, a conductive material such as tungsten is deposited in the slot and the openings and also on the face of the stacked insulating material. Finally, the excess tungsten is removed from the faces of the insulating material of the first and third layers leaving a conductive line sandwiched between the first and third insulating layers of the material; also metal remains in the openings formed to thereby form conductive studs extending from the line to the opposite surfaces of the insulating material sandwich so formed.

Method of forming conductors within an insulating substrate

Method of measuring changes in impedance of a variable impedance load by

A method for forming an electrically conductive line between two layers of insulating material and method for connecting the line through both layers of the insulating material to the opposite surfaces is provided. In the method, first, second and third layers of insulating material are provided wherein said first and third layers are separated by said second layer of insulating material which is different in etch rate from the first and third layers. The edge portion of all three layers is exposed and the insulating layer of the second material is selectively etched to remove the revealed edge portion and provide a slot between the first and third layers of insulating material. Also openings are provided in both the first and third layers of insulating material which communicate with the slot and extend respectively through the layers of the first and third insulating material. Thereafter, a conductive material such as tungsten is deposited in the slot and the openings and also on the face of the stacked insulating material. Finally, the excess tungsten is removed from the faces of the insulating material of the first and third layers leaving a conductive line sandwiched between the first and third insulating layers of the material; also metal remains in the openings formed to thereby form conductive studs extending from the line to the opposite surfaces of the insulating material sandwich so formed.

A method of forming a plurality of conductive studs within a non-planar insulator layer (e.g., PSG or BPSG) disposed between a first series of conductive structures arranged on a substrate and metal lines formed on the upper surface of the insulator layer. Vertical vias are defined through the insulator layer to expose at least one of the first conductive structures on the substrate. A conformal metal layer (e.g., CVD W) is deposited on the insulator layer to fill the vias. Then, the metal layer and the insulator layer subjected to a polish etch in the presence of an abrasive slurry, to remove portions of the metal layer outside of the vias while simultaneously planarizing the insulator layer.

Via-filling and planarization technique

A polishing tool for abrasively polishing a semiconductor wafer that edge clamps the wafer between two rollers. The wafer is spun-up in one plane and the rollers spin in a second plane which is orthogonal to the wafer spin plane. One of the rollers is split with each section rotating in opposite directions. Each of the rollers is mounted by a spring-gimballed assembly to follow the wafer contour.

System for mechanical planarization

In a chem-mech polishing process for planarizing insulators such as silicon oxide and silicon nitride, a pool of slurry is utilized at a temperature between 85.degree. F.-95.degree. F. The slurry particulates (e.g. silica) have a hardness commensurate to the hardness of the insulator to be polished. Under these conditions, wafers can be polished at a high degree of uniformity more economically (by increasing pad lifetime), without introducing areas of locally incomplete polishing.

Wafer flood polishing

A conformal organic layer is used to define spacers on the sidewalls of an organic mandrel. The organic layer (e.g., parylene) can be deposited at low temperatures, and as such is compatible with temperature-sensitive mandrel materials that reflow at high deposition temperatures. The conformal organic material can be dry etched as the same rate as the organic mandrels, while being resistant to wet strip solvents that remove the organic mandrels. This series of etch characteristics make the organic mandrel-organic spacer combination compatible with a host of masking applications.

Process for defining organic sidewall structures

An apparatus and method for monitoring the conductivity of a semiconductor wafer during the course of a polishing process. A polishing pad that contacts the wafer has an active electrode and at least one passive electrode, both of which are embedded in the polishing pad. A detecting device is connected to the active and passive electrodes for monitoring the current between the electrodes as the wafer is lapped by the polishing pad. The etch endpoint of the wafer is determined as a function of the magnitude of the current flow.

In situ conductivity monitoring technique for chemical/mechanical

A coaxial wiring structure that is constructed by depositing and etching a series of conductor layers and insulator layers. More specifically, the shielded transmission line of the invention comprises a first plate structure disposed on a first insulator layer disposed on a substrate; a second insulator layer disposed on the first insulator layer and the first plate structure, the second insulator layer having first troughs exposing end portions of the first plate structure; a central conductor and at least two peripheral conductors disposed on the second insulator layer, the two peripheral conductors contacting the end portions of the first plate structure through the first troughs; a third insulator layer disposed on the second insulator layer, the two peripheral conductors, and the central conductor, the third insulator layer having second troughs exposing respective ones of the peripheral conductors; and an upper plate structure formed on the third insulator layer, the upper plate structure contacting the peripheral conductors through the second troughs. In combination, the upper plate structure, the peripheral conductor structures and the lower plate structure surround the central conductor and are insulated therefrom by the respective insulator layers. The surrounding conductors are coupled to ground potential, and high frequency transmission signals are propagated along the central conductor.

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Bristol, VT, United States of America

Michael A Leach