Intel Corporation

Agilent Technologies, Inc.

Miaobin Gao

Hengju Cheng

Hui-Chin Wu

Christine M Krause

Chien-Chang Liu

Jesse Chin

Yu-Li Hsueh

William H Wang

Brian H Kim

Darren S Crews

Lee Xu

Takashi Hidai

Graham Flower

Robert Elsheimer

Myunghee Lee

Charles Xiaoyi Wang

Song Liu

Yousheng Wu

Xiaojie J Xu

Matthew Scott Abrams

Guobin Liu

Thiri Lwin

Hiu-Chin Wu

Heng-ju Cheng

Gladney Asada

Frank Wang

Simon Lee, Ii

Techniques and mechanisms for providing signal communication with a configurable transceiver circuit. In an embodiment, an integrated circuit comprises transceiver circuitry including an output stage and current mirror circuitry. The output stage is coupled to receive a differential signal pair and to provide at least one output signal based on the differential signal pair. In another embodiment, configuration logic is operable to select between a first mode and a second mode of the transceiver circuit. The first mode includes the current mirror circuitry being disabled from providing a current signal to the output stage, and a first circuit path being closed to provide voltage to the output stage. The second mode includes the first circuit path being open and the current mirror circuitry being enabled to provide a current signal to the output stage.

Configurable transceiver circuit architecture

Embodiments of the present disclosure provide optical link handshake techniques and configurations. In one embodiment, an optical module includes a laser driver corresponding with a channel of the optical module, a signal detector corresponding with the channel, and a link handshake state machine configured to control the laser driver to generate a connect pulse of a link handshake process to test an optical link between the channel and a corresponding channel of another optical module and monitor the signal detector to detect a connect pulse from the another optical module. Other embodiments may be described and/or claimed.

Optical link handshake techniques and configurations

A system includes two optical modules that perform auto-setting of the optical links between the optical modules. One optical module sends an optical signal with a test pattern to the other optical module. If the receiving module determines that the test pattern is successfully received, it sends a pass indication to the transmitting module, and the transmitting module can configure its driver path in accordance with a transmit current setting used to transmit the test pattern. If the test pattern is not successfully received, the receiving module sends a fail indication, and the transmitting module can increase the transmit current setting and resend the test pattern. When the system includes multiple optical channels, one channel can be tested while feedback is provided on another channel. The system can iterate through all optical channels until they are all configured.

Optical link auto-setting

Embodiments of the present disclosure provide laser safety techniques and configurations. In one embodiment, an optical module includes a first die including a laser configured to transmit optical signals, a first node electrically coupled with the laser, and a second node electrically coupled with the laser, and a second die including a power supply line configured to provide power to the laser, a third node electrically coupled with the power supply line and electrically coupled with the first node to provide the power to the laser, a fourth node electrically coupled with the second node of the first die, and a switch configured to prevent the power of the power supply line from reaching the laser through the third node based on a voltage of the fourth node when a laser fault event occurs. Other embodiments may be described and/or claimed.

Laser safety techniques and configurations

A power management arrangement for low power optical transceiver such as those that may be integrated into a personal computer or server may periodically put itself into a power conservation or sleep mode which assures the transceiver is available upon wake-up.

Optical transceiver IC

Described is a method and apparatus for generating a mid-level reference signal and for cancelling amplifier offset in an optical communication system without DC-balancing of optical data. The apparatus comprises an optical-to-electrical converter to receive an optical signal and to generate an electrical signal; an amplifier to receive the electrical signal and to generate an output signal based on a reference signal; a feedback mechanism to be enabled during a training phase only and to generate a control signal from the output signal; and a counter logic having a digital-to-analog converter to generate the reference signal based on the control signal.

Method and apparatus for generating a reference signal level and for cancelling amplifier offset in an optical system

Embodiments introduce redundant optical channels to significantly extend the lifetime of parallel optical transceivers. A plurality of transmitters, N, transmit on a plurality of optical channels, where N is an integer number of optical channels greater than 1. One or more redundant channels, M, are also provided. N+M multiple input shift registers provide multiple paths for signals from each of the transmitters to connect to N+M laser diodes. In the event up to M of the N+M laser diodes fail, the multiple input shift registers connect the N transmitters to functioning ones of the N+M laser diodes thus extending the life of the device. A corresponding scheme is also described for the receiver side.

Redundant channel implementation to extend optical transceiver lifetime and reliability

A stream of data may flow over a fiber or other medium without any accompanying clock signal. The receiving device may then be required to process this data synchronously. Embodiments describe clock and data recovery (CDR) circuits which may sample a data signal at a plurality of sampling points to partition a clock cycle into four phase regions P, P, P, and Pwhich may be represented on a phase plane being divided into four quadrants. A relative phase between a data signal transition edge and a clock phase may be represented by a phasor on the phase plane. The clock phase and frequency may be adjusted by determining the instantaneous location of the phasor and the direction of phasor rotation in the phase plane.

Phase/frequency detector and charge pump architecture for referenceless clock and data recovery (CDR) applications

In one embodiment, the present invention includes an apparatus having a voltage controlled oscillator (VCO) to generate a first clock signal having a frequency controlled by a bias current coupling ratio of first and second bias currents, and a control circuit coupled to the VCO to generate a first pair of control signals to adjust the bias current coupling ratio. Other embodiments are described and claimed.

Bang-bang architecture

A laser driver for generating drive waveforms that are suitable for driving a single VCSEL or an array of VCSELs. A digital controller is integrated into the laser driver and is utilized to initially program and selectively adjust during the operation of the driver one or more of the following VCSEL drive waveform parameters: (1) bias current, (2) modulation current, (3) negative peaking depth, and (4) negative peaking duration. The laser driver has an aging compensation mechanism for monitoring the age of the laser and for selectively adjusting the dc and ac parameters of the VCSEL drive waveform to compensate for the aging of the laser. The laser driver also has a temperature compensation mechanism for monitoring the temperature of the driver IC and selectively adjusting the dc and ac parameters of the VCSEL drive waveform to compensate for the changes in temperature.

Open-loop laser driver having an integrated digital controller

Clocking domain conversion system and method

Growing community of inventors

Saratoga, CA, United States of America

Miaobin Gao